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TLC2274AIPWR
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Texas Instruments Operational Amplifier, TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTLC2274AIPWR
Texas Instruments · Operational Amplifier · TSSOP-14
TLC2274AIPWR from Texas Instruments, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1OUT | output | Output of channel 1; the output may be shorted to either supply, and absolute maximum output current is ±50 mA. |
| 2 | 1IN- | input | Inverting input of channel 1; input voltage must stay between VDD− and VDD+ − 1.5 V per the recommended operating conditions. |
| 3 | 1IN+ | input | Non-inverting input of channel 1; input voltage must stay between VDD− and VDD+ − 1.5 V per the recommended operating conditions. |
| 4 | VDD+ | power_in | Positive (highest) supply; recommended supply range is ±2.2 V to ±8 V, with an absolute maximum of 8 V. |
| 5 | 2IN+ | input | Non-inverting input of channel 2; input voltage must stay between VDD− and VDD+ − 1.5 V per the recommended operating conditions. |
| 6 | 2IN- | input | Inverting input of channel 2; input voltage must stay between VDD− and VDD+ − 1.5 V per the recommended operating conditions. |
| 7 | 2OUT | output | Output of channel 2; the output may be shorted to either supply, and absolute maximum output current is ±50 mA. |
| 8 | 3OUT | output | Output of channel 3; the output may be shorted to either supply, and absolute maximum output current is ±50 mA. |
| 9 | 3IN- | input | Inverting input of channel 3; input voltage must stay between VDD− and VDD+ − 1.5 V per the recommended operating conditions. |
| 10 | 3IN+ | input | Non-inverting input of channel 3; input voltage must stay between VDD− and VDD+ − 1.5 V per the recommended operating conditions. |
| 11 | VDD− | power_in | Negative (lowest) supply; absolute maximum of −8 V. |
| 12 | 4IN+ | input | Non-inverting input of channel 4; input voltage must stay between VDD− and VDD+ − 1.5 V per the recommended operating conditions. |
| 13 | 4IN- | input | Inverting input of channel 4; input voltage must stay between VDD− and VDD+ − 1.5 V per the recommended operating conditions. |
| 14 | 4OUT | output | Output of channel 4; the output may be shorted to either supply, and absolute maximum output current is ±50 mA. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-14 |
| Category | Amplifiers |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage, VDD+ | VDD+ | 8 | V | Referenced to midpoint of VDD+ and VDD− | 5 | ||
| Supply voltage, VDD− | VDD- | -8 | V | Referenced to midpoint of VDD+ and VDD− | 5 | ||
| Differential input voltage | VID | -16 | 16 | V | Differential voltage, IN+ with respect to IN− | 5 | |
| Input current (any input) | II | -5 | 5 | mA | Any input | 5 | |
| Output current | IO | -50 | 50 | mA | 5 | ||
| Total current into VDD+ | -50 | 50 | mA | 5 | |||
| Total current out of VDD− | -50 | 50 | mA | 5 | |||
| Operating free-air temperature range, TA | TA | -40 | 125 | °C | I and Q level parts | 5 | |
| Storage temperature | Tstg | -65 | 150 | °C | 5 | ||
| Lead temperature | 260 | °C | 1,6 mm from case for 10 s; D, N, P or PW package | 5 | |||
| Supply voltage VDD± (dual supply) | VDD± | 2.2 | 8 | V | I level parts; printed as ±2.2 V to ±8 V | 5 | |
| Operating free-air temperature, TA | TA | -40 | 125 | °C | I level parts | 6 | |
| Input offset voltage VIO, TA = 25°C | VIO | 300 | 950 | µV | VIC = 0 V, VDD± = ±2.5 V, VO = 0 V, RS = 50 Ω; TA = 25°C; VDD = 5 V, TLC2274A | 9 | |
| Input offset voltage VIO, full range | VIO | 1500 | µV | VIC = 0 V, VDD± = ±2.5 V, VO = 0 V, RS = 50 Ω; Full range(1); VDD = 5 V, TLC2274A | 9 | ||
| Input offset current IIO, TA = 25°C | IIO | 0.5 | 60 | pA | VIC = 0 V, VDD± = ±2.5 V, VO = 0 V, RS = 50 Ω; TA = 25°C; all level parts; VDD = 5 V | 9 | |
| Input offset current IIO, I level | IIO | 150 | pA | VIC = 0 V, VDD± = ±2.5 V, VO = 0 V, RS = 50 Ω; TA = −40°C to 85°C; I level part; VDD = 5 V | 9 | ||
| Input bias current IIB, TA = 25°C | IIB | 1 | 60 | pA | VIC = 0 V, VDD± = ±2.5 V, VO = 0 V, RS = 50 Ω; TA = 25°C; all level parts; VDD = 5 V | 9 | |
| Input bias current IIB, I level | IIB | 150 | pA | VIC = 0 V, VDD± = ±2.5 V, VO = 0 V, RS = 50 Ω; TA = −40°C to 85°C; I level part; VDD = 5 V | 9 | ||
| Common-mode input voltage VICR, TA = 25°C | VICR | -0.3 | 2.5 | 4 | V | RS = 50 Ω; /VIO/ ≤ 5 mV; TA = 25°C; VDD = 5 V | 9 |
| Common-mode input voltage VICR, full range | VICR | 0 | 2.5 | 3.5 | V | RS = 50 Ω; /VIO/ ≤ 5 mV; Full range(1); VDD = 5 V | 9 |
| High-level output voltage VOH, IOH = −200 µA, TA = 25°C | VOH | 4.85 | 4.93 | V | IOH = −200 µA; TA = 25°C; VDD = 5 V | 9 | |
| High-level output voltage VOH, IOH = −200 µA, full range | VOH | 4.85 | V | IOH = −200 µA; Full range(1); VDD = 5 V | 9 | ||
| High-level output voltage VOH, IOH = −1 mA, TA = 25°C | VOH | 4.25 | 4.65 | V | IOH = −1 mA; TA = 25°C; VDD = 5 V | 9 | |
| High-level output voltage VOH, IOH = −1 mA, full range | VOH | 4.25 | V | IOH = −1 mA; Full range(1); VDD = 5 V | 9 | ||
| Low-level output voltage VOL, IOL = 500 µA, TA = 25°C | VOL | 0.09 | 0.15 | V | VIC = 2.5 V; IOL = 500 µA; TA = 25°C; VDD = 5 V | 10 | |
| Low-level output voltage VOL, IOL = 500 µA, full range | VOL | 0.15 | V | VIC = 2.5 V; IOL = 500 µA; Full range(1); VDD = 5 V | 10 | ||
| Low-level output voltage VOL, IOL = 5 mA, TA = 25°C | VOL | 0.9 | 1.5 | V | VIC = 2.5 V; IOL = 5 mA; TA = 25°C; VDD = 5 V | 10 | |
| Low-level output voltage VOL, IOL = 5 mA, full range | VOL | 1.5 | V | VIC = 2.5 V; IOL = 5 mA; Full range(1); VDD = 5 V | 10 | ||
| Large-signal differential voltage amplification AVD, TA = 25°C | AVD | 15 | 35 | V/mV | VIC = 2.5 V, VO = 1 V to 4 V; RL = 10 kΩ; TA = 25°C; I level part; VDD = 5 V | 10 | |
| Large-signal differential voltage amplification AVD, I level | AVD | 15 | V/mV | VIC = 2.5 V, VO = 1 V to 4 V; RL = 10 kΩ; TA = −40°C to 85°C; I level part; VDD = 5 V | 10 | ||
| Common-mode rejection ratio CMRR, TA = 25°C | CMRR | 70 | 75 | dB | VIC = 0 V to 2.7 V, VO = 2.5 V, RS = 50 Ω; TA = 25°C; VDD = 5 V | 10 | |
| Common-mode rejection ratio CMRR, full range | CMRR | 70 | dB | VIC = 0 V to 2.7 V, VO = 2.5 V, RS = 50 Ω; Full range(1); VDD = 5 V | 10 | ||
| Supply-voltage rejection ratio kSVR, TA = 25°C | kSVR | 80 | 95 | dB | VDD = 4.4 V to 16 V, VIC = VDD/2, no load; TA = 25°C; VDD = 5 V | 10 | |
| Supply current IDD, TA = 25°C | IDD | 4.4 | 6 | mA | VO = 2.5 V, no load; TA = 25°C; VDD = 5 V | 10 | |
| Supply current IDD, full range | IDD | 6 | mA | VO = 2.5 V, no load; Full range(1); VDD = 5 V | 10 | ||
| Slew rate SR, TA = 25°C | SR | 2.3 | 3.6 | V/µs | VO = 0.5 V to 2.5 V, RL = 10 kΩ, CL = 100 pF; TA = 25°C; VDD = 5 V | 10 | |
| Slew rate SR, full range | SR | 1.7 | V/µs | VO = 0.5 V to 2.5 V, RL = 10 kΩ, CL = 100 pF; Full range(1); VDD = 5 V | 10 | ||
| Input offset voltage VIO, TA = 25°C | VIO | 300 | 950 | µV | VIC = 0 V, VO = 0 V, RS = 50 Ω; TA = 25°C; VDD± = ±5 V; TLC2274A | 11 | |
| Input offset voltage VIO, full range | VIO | 1500 | µV | VIC = 0 V, VO = 0 V, RS = 50 Ω; Full range(1); VDD± = ±5 V; TLC2274A | 11 | ||
| Common-mode input voltage VICR, TA = 25°C | VICR | -5.3 | 0 | 4 | V | RS = 50 Ω; /VIO/ ≤ 5 mV; TA = 25°C; VDD± = ±5 V | 11 |
| Common-mode input voltage VICR, full range | VICR | -5 | 0 | 3.5 | V | RS = 50 Ω; /VIO/ ≤ 5 mV; Full range(1); VDD± = ±5 V | 11 |
| Maximum positive peak output voltage VOM+, IO = −200 µA, TA = 25°C | VOM+ | 4.85 | 4.93 | V | IO = −200 µA; TA = 25°C; VDD± = ±5 V | 11 | |
| Maximum positive peak output voltage VOM+, IO = −200 µA, full range | VOM+ | 4.85 | V | IO = −200 µA; Full range(1); VDD± = ±5 V | 11 | ||
| Maximum positive peak output voltage VOM+, IO = −1 mA, TA = 25°C | VOM+ | 4.25 | 4.65 | V | IO = −1 mA; TA = 25°C; VDD± = ±5 V | 11 | |
| Maximum positive peak output voltage VOM+, IO = −1 mA, full range | VOM+ | 4.25 | V | IO = −1 mA; Full range(1); VDD± = ±5 V | 11 | ||
| Maximum negative peak output voltage VOM−, IO = 500 µA, TA = 25°C | VOM- | -4.85 | -4.91 | V | VIC = 0 V; IO = 500 µA; TA = 25°C; VDD± = ±5 V | 11 | |
| Maximum negative peak output voltage VOM−, IO = 500 µA, full range | VOM- | -4.85 | V | VIC = 0 V; IO = 500 µA; Full range(1); VDD± = ±5 V | 11 | ||
| Maximum negative peak output voltage VOM−, IO = 5 mA, TA = 25°C | VOM- | -3.5 | -4.1 | V | VIC = 0 V; IO = 5 mA; TA = 25°C; VDD± = ±5 V | 11 | |
| Maximum negative peak output voltage VOM−, IO = 5 mA, full range | VOM- | -3.5 | V | VIC = 0 V; IO = 5 mA; Full range(1); VDD± = ±5 V | 11 | ||
| Large-signal differential voltage amplification AVD, TA = 25°C | AVD | 25 | 50 | V/mV | VO = ±4 V; RL = 10 kΩ; TA = 25°C; I level part; VDD± = ±5 V | 11 | |
| Large-signal differential voltage amplification AVD, I level | AVD | 25 | V/mV | VO = ±4 V; RL = 10 kΩ; TA = −40°C to 85°C; I level part; VDD± = ±5 V | 11 | ||
| Common-mode rejection ratio CMRR, TA = 25°C | CMRR | 75 | 80 | dB | VIC = −5 V to 2.7 V, VO = 0 V, RS = 50 Ω; TA = 25°C; VDD± = ±5 V | 11 | |
| Common-mode rejection ratio CMRR, full range | CMRR | 75 | dB | VIC = −5 V to 2.7 V, VO = 0 V, RS = 50 Ω; Full range(1); VDD± = ±5 V | 11 | ||
| Supply-voltage rejection ratio kSVR, TA = 25°C | kSVR | 80 | 95 | dB | VDD+ = 2.2 V to ±8 V, VIC = 0 V, no load; TA = 25°C | 11 | |
| Supply current IDD, TA = 25°C | IDD | 4.8 | 6 | mA | VO = 0 V, no load; TA = 25°C; VDD± = ±5 V | 11 | |
| Supply current IDD, full range | IDD | 6 | mA | VO = 0 V, no load; Full range(1); VDD± = ±5 V | 11 | ||
| Slew rate SR, TA = 25°C | SR | 2.3 | 3.6 | V/µs | VO = ±2.3 V, RL = 10 kΩ, CL = 100 pF; TA = 25°C; VDD± = ±5 V | 12 | |
| Junction-to-ambient thermal resistance RθJA (PW, TSSOP-14) | RθJA | 111.6 | °C/W | TA = −55°C to 125°C; TLC2274 PW (TSSOP) 14-pin | 6 | ||
| Junction-to-case (top) thermal resistance RθJC(top) (PW, TSSOP-14) | RθJC(top) | 41.2 | °C/W | TA = −55°C to 125°C; TLC2274 PW (TSSOP) 14-pin | 6 | ||
| Junction-to-board thermal resistance RθJB (PW, TSSOP-14) | RθJB | 54.7 | °C/W | TA = −55°C to 125°C; TLC2274 PW (TSSOP) 14-pin | 6 |
CAD (KiCad official)
- Symbol:
TLC2274AIPWR - Footprint:
Package_SO:TSSOP-14_4.4x5mm_P0.65mm - 3D model: TSSOP-14 (KiCad packages3D, STEP)
- 3D model files:
tlc2274aipwr-etched.step/tlc2274aipwr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tlc2274aipwr.step/tlc2274aipwr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (62 pp, sha256
b55a188c31bedc86, retrieved 2026-10-28, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).