component

TL082CDR

Public Made by Adom

by adom

Texas Instruments FET InputAmplifiers, SOIC-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

componentop-amp-cmptl082cdr
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3D Model

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Symbol & Footprint

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Datasheet

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Contents

README

markdown

TL082CDR

Texas Instruments · FET InputAmplifiers · SOIC-8

TL082CDR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1OUT output Output of amplifier 1. Push-pull output with short-circuit protection; typical peak output swing ±13.5 V into RL ≥ 10 kΩ at VCC = ±15 V.
2 1IN- input Inverting (negative) input of amplifier 1. High-impedance JFET input (rᵢ ≈ 10¹² Ω); input bias current ~30 pA typical.
3 1IN+ input Non-inverting (positive) input of amplifier 1. High-impedance JFET input; common-mode input voltage range typically -12 V to +15 V at VCC = ±15 V.
4 VCC- power_in Negative supply rail. Recommended operating range -5 V to -15 V; absolute maximum -18 V. Shared by both amplifiers.
5 2IN+ input Non-inverting (positive) input of amplifier 2. High-impedance JFET input; common-mode input voltage range typically -12 V to +15 V at VCC = ±15 V.
6 2IN- input Inverting (negative) input of amplifier 2. High-impedance JFET input (rᵢ ≈ 10¹² Ω); input bias current ~30 pA typical.
7 2OUT output Output of amplifier 2. Push-pull output with short-circuit protection; typical peak output swing ±13.5 V into RL ≥ 10 kΩ at VCC = ±15 V.
8 VCC+ power_in Positive supply rail. Recommended operating range +5 V to +15 V; absolute maximum +18 V. Shared by both amplifiers.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-8
Category Op-amp/Cmp
Pins 8

Ordering variants

Same part, different packaging or reel option.

  • TL082CDRD
  • TL082CDR
  • TL082CDRP
  • TL082CDRJG
  • TL082CDRPS
  • TL082CDRPW
  • TL082CDRPWR
  • TL082CDRFK

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VCC+ VCC+ 18 V 5
Supply voltage VCC– VCC– -18 V 5
Differential input voltage VID -30 30 V 5
Input voltage VI -15 15 V 5
Operating free-air temperature range (TL08_C) TA 0 70 °C TL08_C (TL082C) 5
Operating virtual junction temperature 150 °C 5
Storage temperature Tstg -65 150 °C 5
Supply voltage VCC+ VCC+ 5 15 V 5
Supply voltage VCC– VCC– -15 -5 V 5
Ambient temperature (TL08xC) TA 0 70 °C TL08xC 5
Input offset voltage VIO 3 15 mV TA = 25°C; VO = 0, RS = 50 Ω 6
Input offset voltage (full range) VIO 20 mV TA = Full range; VO = 0, RS = 50 Ω 6
Input offset current IIO 5 200 pA TA = 25°C; VO = 0 6
Input offset current (full range) IIO 2 nA TA = Full range; VO = 0 6
Input bias current IIB 30 400 pA TA = 25°C; VO = 0 6
Input bias current (full range) IIB 10 nA TA = Full range; VO = 0 6
Common-mode input voltage range VICR -12 V TA = 25°C 6
Maximum peak output voltage swing VOM 12 13.5 V TA = 25°C; RL = 10 kΩ 6
Maximum peak output voltage swing VOM 12 V TA = Full range; RL ≥ 10 kΩ 6
Maximum peak output voltage swing VOM 10 12 V TA = Full range; RL ≥ 2 kΩ 6
Large-signal differential voltage amplification AVD 25 200 V/mV TA = 25°C; VO = ±10 V, RL ≥ 2 kΩ 6
Large-signal differential voltage amplification (full range) AVD 15 V/mV TA = Full range; VO = ±10 V, RL ≥ 2 kΩ 6
Common-mode rejection ratio CMRR 70 86 dB TA = 25°C; VIC = VICRmin, VO = 0, RS = 50 Ω 6
Supply-voltage rejection ratio kSVR 70 86 dB TA = 25°C; VCC = ±15 V to ±9 V, VO = 0, RS = 50 Ω 6
Supply current (each amplifier) ICC 1.4 2.8 mA TA = 25°C; VO = 0, no load 7
Slew rate at unity gain SR 8 13 V/μs VI = 10 V, RL = 2 kΩ, CL = 100 pF 7
Slew rate at unity gain (TA = −55°C to 125°C) SR 5 V/μs VI = 10 V, RL = 2 kΩ, CL = 100 pF, TA = −55°C to 125°C 7
Junction-to-ambient thermal resistance (D, SOIC 8-pin) RθJA 97 °C/W D (SOIC) 8 pins 6

CAD (KiCad official)

  • Symbol: TL082CDR
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: tl082cdr-etched.step / tl082cdr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tl082cdr.step / tl082cdr.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
tl082cdr.step 122 KB You want the bare part, or you mark your own boards.
tl082cdr-etched.step 1.9 MB You want the part with TL082CDR already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 455 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (50 pp, sha256 692a814e502d6ffb, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF