component
LP3220SAB5F
Public Made by Adomby adom
LOWPOWER DC-DC Converters, SOT-23-5. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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Contents
README
markdownLP3220SAB5F
LOWPOWER · DC-DC Converters · SOT-23-5
LP3220SAB5F from LOWPOWER, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | EN | input | Enable pin, active high. Pull high (VEN(H) >= 1.4V) to enable the converter; pull low (VEN(L) <= 0.4V) to force the device into low-power shutdown (<1uA total input current). Input low current 1uA max at VEN=5V. |
| 2 | GND | power_in | Device ground. Return for internal control circuitry and the low-side synchronous rectifier MOSFET source. Must be tied to the system ground plane with low-impedance connection. |
| 3 | LX | output | Switch node connection to the external inductor. Connects to the drains of the internal main P-channel and synchronous N-channel power MOSFETs. Absolute max 8.0V to GND; keep trace short to minimize EMI. |
| 4 | VIN | power_in | Supply input, 2.2V to 5.5V (abs max 8.0V). Powers the internal control circuitry and the high-side P-channel MOSFET drain. Must be closely decoupled to GND with a 10uF or greater ceramic capacitor. |
| 5 | FB/Vout | input | Feedback input. On the adjustable LP3220SAB5F variant this pin senses the divided output voltage against the internal 0.6V reference (VOUT = 0.6V x (1 + R1/R2)). On fixed-voltage variants (-12/-18/-33) this pin is tied directly to VOUT for internal feedback. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | LOWPOWER |
| Package | SOT-23-5 |
| Category | PMIC |
| Pins | 5 |
Ordering variants
Same part, different packaging or reel option.
LP3220SAB5FLP3220SAB5F-12B5FLP3220SAB5F-18B5FLP3220SAB5F-33B5F
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Voltage | VIN | 2.2 | 5.5 | V | 5 | ||
| Output Voltage Range (LP3220SAB5F) | VOUT | 0.61 | V | 5 | |||
| Feedback Threshold Voltage Accuracy | VFB | 0.588 | 0.6 | 0.612 | V | 5 | |
| Input Over Voltage Protection | VIN_OVP | 6.2 | V | 5 | |||
| Input OVP Hysteresis | VIN_OVPHYS | 0.2 | V | 5 | |||
| UVLO Threshold | VUVLO | 2 | V | VIN Rising | 5 | ||
| UVLO Hysteresis | VUV-HYS | 0.1 | V | 5 | |||
| Quiescent Current | IQ | 70 | µA | 5 | |||
| Shutdown Current | ISHDN | 1 | µA | VEN = GND | 5 | ||
| P-Channel Current Limit | ILIM | 2 | A | 5 | |||
| High-Side Switch On Resistance | RDS(ON)_H | 300 | mΩ | 5 | |||
| Low-Side Switch On Resistance | RDS(ON)_L | 200 | mΩ | 5 | |||
| FB Leakage Current | IFB | 10 | nA | VFB = 1.0V | 5 | ||
| Oscillator Frequency | FOSC | 1.5 | MHz | 5 | |||
| Startup Time | TS | 110 | µs | From Enable to Output Regulation | 5 | ||
| Over-Temperature Shutdown Threshold | TSD | 150 | ℃ | 5 | |||
| Enable Threshold Low | VEN(L) | 0.4 | V | 5 | |||
| Enable Threshold High | VEN(H) | 1.4 | V | 5 | |||
| Input Low Current | IEN | 1 | µA | VEN = 5.0V | 5 | ||
| Input Voltage to GND | VIN | 8 | V | 4 | |||
| LX Voltage to GND | 8 | V | 4 | ||||
| Output Voltage to GND | VOUT | 6 | V | 4 | |||
| Other Pin Voltage to GND | 6 | V | 4 | ||||
| Maximum Junction Temperature | 150 | ℃ | 4 | ||||
| Operating Ambient Temperature Range | TA | -40 | 85 | ℃ | 4 | ||
| Maximum Soldering Temperature | 260 | ℃ | at leads, 10 sec | 4 | |||
| ESD HBM (Human Body Model) | 2 | KV | 4 | ||||
| ESD MM (Machine Model) | 200 | V | 4 | ||||
| Maximum Power Dissipation (SOT23-5) | PD | 0.45 | W | TA=25℃ | 4 | ||
| Thermal Resistance (SOT23-5) | θJA | 250 | ℃/W | 4 |
CAD (KiCad official)
- Symbol:
LP3220SAB5F - Footprint:
Package_TO_SOT_SMD:SOT-23-5 - 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files:
lp3220sab5f-etched.step/lp3220sab5f-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);lp3220sab5f.step/lp3220sab5f.glbare the bare package body.
3D model downloads
Two STEP files. Same geometry, different body top:
| File | Size | Use it when |
|---|---|---|
lp3220sab5f.step |
85 KB | You want the bare part, or you mark your own boards. |
lp3220sab5f-etched.step |
2.3 MB | You want the part with LP3220SAB5F already on it. |
The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 555 faces against 102 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: LOWPOWER datasheet (11 pp, sha256
f568f91ecbf3261b, retrieved 2026-08-17, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).