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TPS7A1601ADGNR
Public Made by Adomby adom
Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, HVSSOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTPS7A1601ADGNR
Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · HVSSOP-8
TPS7A1601ADGNR from Texas Instruments, in a HVSSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUT | power_out | Regulator output pin; a capacitor greater than 2.2 µF must be tied from this pin to ground for stability, and a 10-µF ceramic capacitor is recommended as close to the device as possible. |
| 2 | FB/DNC | input | For the adjustable version this is the feedback input to the control-loop error amplifier that sets the output voltage through external resistors; do not route this pin to any net, including GND or IN, on fixed-voltage versions. |
| 3 | PG | output | Open-collector, active-high power-good output with a user-programmable delay; leave open or connect to GND if the power-good function is not needed. |
| 4 | GND | power_in | Ground pin. |
| 5 | EN | input | Enable pin that turns the regulator on when VEN is at or above VEN_HI and off when VEN is at or below VEN_LO; it may be tied to IN if unused, and VEN must remain at or below VIN at all times. |
| 6 | NC | unconnected | No internal connection; this pin can be left open or tied to any voltage between GND and IN. |
| 7 | DELAY | output | Delay pin for the PG delay time; connect a capacitor to GND to set the delay, or leave open if the reset function is not needed, with DELAY pin voltage specified from 0 V to 5 V. |
| 8 | IN | power_in | Regulator input supply pin, operating from 3 V to 60 V; a capacitor greater than 0.1 µF must be tied from this pin to ground for stability, and a 10-µF ceramic capacitor is recommended close to the device. |
| 9 | Thermal pad | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | HVSSOP-8 |
| Category | Power Management (PMIC) |
| Pins | 9 |
CAD (KiCad official)
- Symbol:
TPS7A1601ADGNR - Footprint:
Package_SO:HVSSOP-8-1EP_3x3mm_P0.65mm_EP1.57x1.89mm - 3D model: HVSSOP-8, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 1.0 mm nominal HVSSOP height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
- 3D model files:
tps7a1601adgnr-etched.step/tps7a1601adgnr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps7a1601adgnr.step/tps7a1601adgnr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (25 pp, sha256
28655df2042aed38, retrieved 2026-10-08, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).