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Contents

Pinout
Key specifications
Electrical characteristics
Materials and finish
CAD (KiCad official)
Provenance

README

markdown

XT25F256BWSIGT

XTX · NOR FLASH · WSON-8-EP(6x8)

XT25F256BWSIGT from XTX, in a WSON-8-EP(6x8). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	CS#	input	Chip Select Input for the serial interface.
2	SO (IO1)	bidirectional	Data Output (Data Input Output 1); IO1 is used for Standard and Dual SPI instructions.
3	WP# (IO2)	bidirectional	Write Protect Input (Data Input Output 2); IO2 is used for Quad SPI, and the WP# function is only available for Standard/Dual SPI.
4	VSS	power_in	Ground.
5	SI (IO0)	bidirectional	Data Input (Data Input Output 0); IO0 is used for Standard and Dual SPI instructions.
6	SCLK	input	Serial Clock Input.
7	HOLD# / RESET# / IO3	bidirectional	HOLD Input / RESET Input / Data Input Output 3; IO3 is used for Quad SPI, and the HOLD# function is only available for Standard/Dual SPI.
8	VCC	power_in	Power Supply.
9	EP	passive	Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter	Value
Manufacturer	XTX
Package	WSON-8-EP(6x8)
Category	Memory
Pins	9

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Serial Clock Frequency (fC1, all commands except 03H, 3BH, BBH, 6BH, EBH, E7H, 94H in SPI mode, QPI and DTR)	fC1			120	MHz	TA=-40°C~~85°C, VCC=2.7~~3.6V, CL=30pF	80
Serial Clock Frequency for 3BH, 6BH	fC2			108	MHz	TA=-40°C~~85°C, VCC=2.7~~3.6V, CL=30pF	80
Serial Clock Frequency for BBH, EBH, E7H, 94H	fC3			104	MHz	TA=-40°C~~85°C, VCC=2.7~~3.6V, CL=30pF	80
Clock frequency QPI instructions	fC4			80	MHz	TA=-40°C~~85°C, VCC=2.7~~3.6V, CL=30pF	80
Clock frequency DTR instructions	fC5			50	MHz	TA=-40°C~~85°C, VCC=2.7~~3.6V, CL=30pF	80
Serial Clock Frequency for Read Data (03H)	fR			80	MHz	TA=-40°C~~85°C, VCC=2.7~~3.6V, CL=30pF	80
Serial Clock Rise Time (Slew Rate)	tCLCH	0.1			V/ns	TA=-40°C~~85°C, VCC=2.7~~3.6V, CL=30pF	80
Serial Clock Fall Time (Slew Rate)	tCHCL	0.1			V/ns	TA=-40°C~~85°C, VCC=2.7~~3.6V, CL=30pF	80
CS# Active Setup Time	tSLCH	5			ns	TA=-40°C~~85°C, VCC=2.7~~3.6V, CL=30pF	80
CS# Active Hold Time	tCHSH	3			ns	TA=-40°C~~85°C, VCC=2.7~~3.6V, CL=30pF	80
CS# Not Active Setup Time	tSHCH	3			ns	TA=-40°C~~85°C, VCC=2.7~~3.6V, CL=30pF	80
CS# Not Active Hold Time	tCHSL	3			ns	TA=-40°C~~85°C, VCC=2.7~~3.6V, CL=30pF	80
CS# High Time (read/write)	tSHSL	20			ns	TA=-40°C~~85°C, VCC=2.7~~3.6V, CL=30pF	80
Output Disable Time	tSHQZ			9	ns	TA=-40°C~~85°C, VCC=2.7~~3.6V, CL=30pF	80
Output Hold Time	tCLQX	2			ns	TA=-40°C~~85°C, VCC=2.7~~3.6V, CL=30pF	80
Clock Low To Output Valid	tCLQV			8	ns	TA=-40°C~~85°C, VCC=2.7~~3.6V, CL=30pF	80
Data In Setup Time	tDVCH	2			ns	TA=-40°C~~85°C, VCC=2.7~~3.6V, CL=30pF	80
Data In Hold Time	tCHDX	2			ns	TA=-40°C~~85°C, VCC=2.7~~3.6V, CL=30pF	80
Hold# Low Setup Time (relative to Clock)	tHLCH	5			ns	TA=-40°C~~85°C, VCC=2.7~~3.6V, CL=30pF	80
Hold# High Setup Time (relative to Clock)	tHHCH	5			ns	TA=-40°C~~85°C, VCC=2.7~~3.6V, CL=30pF	80
Hold# High Hold Time (relative to Clock)	tCHHL	5			ns	TA=-40°C~~85°C, VCC=2.7~~3.6V, CL=30pF	80
Hold# Low Hold Time (relative to Clock)	tCHHH	5			ns	TA=-40°C~~85°C, VCC=2.7~~3.6V, CL=30pF	80
Hold# Low To High-Z Output	tHLQZ			8	ns	TA=-40°C~~85°C, VCC=2.7~~3.6V, CL=30pF	80
Hold# High To Low-Z Output	tHHQX			8	ns	TA=-40°C~~85°C, VCC=2.7~~3.6V, CL=30pF	80
Write Protect Hold Time After CS# High	tSHWL	100			ns	TA=-40°C~~85°C, VCC=2.7~~3.6V, CL=30pF	80
CS# High To Deep Power-Down Mode	tDP			7	μs	TA=-40°C~~85°C, VCC=2.7~~3.6V, CL=30pF	80
CS# High To Standby Mode Without Electronic Signature Read	tRES1			7	μs	TA=-40°C~~85°C, VCC=2.7~~3.6V, CL=30pF	80
CS# High To Standby Mode With Electronic Signature Read	tRES2			7	μs	TA=-40°C~~85°C, VCC=2.7~~3.6V, CL=30pF	80
CS# High To Next Command After Reset (from read)	tRST_R			20	μs	TA=-40°C~~85°C, VCC=2.7~~3.6V, CL=30pF	80
CS# High To Next Command After Reset (from program)	tRST_P			20	μs	TA=-40°C~~85°C, VCC=2.7~~3.6V, CL=30pF	80
CS# High To Next Command After Reset (from erase)	tRST_E			20	μs	TA=-40°C~~85°C, VCC=2.7~~3.6V, CL=30pF	80
CS# High To Next Command After Suspend	tSUS			50	μs	TA=-40°C~~85°C, VCC=2.7~~3.6V, CL=30pF	80
Write Status Register Cycle Time	tW		1	20	ms	TA=-40°C~~85°C, VCC=2.7~~3.6V, CL=30pF	80
Page Programming Time	tPP		0.25	1.25	ms	TA=-40°C~~85°C, VCC=2.7~~3.6V, CL=30pF	81
Byte Programming Time (First Byte)	tBP		30	100	μs	TA=-40°C~~85°C, VCC=2.7~~3.6V, CL=30pF	81
Sector Erase Time	tSE		40	1500	ms	TA=-40°C~~85°C, VCC=2.7~~3.6V, CL=30pF	81
Block Erase Time (32K Bytes)	tBE1		0.15	4	s	TA=-40°C~~85°C, VCC=2.7~~3.6V, CL=30pF	81
Block Erase Time (64K Bytes)	tBE2		0.22	5	s	TA=-40°C~~85°C, VCC=2.7~~3.6V, CL=30pF	81
Chip Erase Time	tCE		70	300	s	TA=-40°C~~85°C, VCC=2.7~~3.6V, CL=30pF	81
Input Leakage Current	ILI	-2		2	μA	TA=-40°C~~85°C, VCC=2.70~~3.60V	79
Output Leakage Current	ILO	-2		2	μA	TA=-40°C~~85°C, VCC=2.70~~3.60V	79
Standby Current	ICC1		15	90	μA	TA=-40°C~~85°C, VCC=2.70~~3.60V; CS#=VCC, VIN=VCC or VSS	79
Deep Power-Down Current	ICC2		0.5	10	μA	TA=-40°C~~85°C, VCC=2.70~~3.60V; CS#=VCC, VIN=VCC or VSS	79
Operating Current (Read) at 108MHz	ICC3		10	30	mA	TA=-40°C~~85°C, VCC=2.70~~3.60V; CLK=0.1VCC/0.9VCC at 108MHz, Q=Open (1,2,*4 I/O)	79
Operating Current (Read) at 80MHz	ICC3		8	22	mA	TA=-40°C~~85°C, VCC=2.70~~3.60V; CLK=0.1VCC/0.9VCC at 80MHz, Q=Open (1,2,*4 I/O)	79
Operating Current (Read) at 48MHz	ICC3		6	17	mA	TA=-40°C~~85°C, VCC=2.70~~3.60V; CLK=0.1VCC/0.9VCC at 48MHz, Q=Open (1,2,*4 I/O)	79
Operating Current (PP)	ICC4			40	mA	TA=-40°C~~85°C, VCC=2.70~~3.60V; CS#=VCC	79
Operating Current (WRSR)	ICC5			10	mA	TA=-40°C~~85°C, VCC=2.70~~3.60V; CS#=VCC	79
Operating Current (SE)	ICC6			40	mA	TA=-40°C~~85°C, VCC=2.70~~3.60V; CS#=VCC	79
Operating Current (BE)	ICC7			40	mA	TA=-40°C~~85°C, VCC=2.70~~3.60V; CS#=VCC	79
Input Low Voltage	VIL	-0.5			V	TA=-40°C~~85°C, VCC=2.70~~3.60V	79
Output Low Voltage	VOL			0.4	V	TA=-40°C~~85°C, VCC=2.70~~3.60V; IOL=1.6mA	79
Power-on: VCC (min) To CS# Low	tVSL	1			ms		77
Write Inhibit Voltage	VWI	1		1.5	V		77
VCC Ramp Rate	VCC ramp rate	2			V/ms	VCC ramp rate must exceed 2V/ms otherwise a Hardware reset would be required	77
Latch-up Input Voltage Respect To VSS On I/O Pins (minimum)		-1			V		77
VCC Latch-up Current		-200		200	mA		77
Ambient Operating Temperature		-40		85	°C		78
Storage Temperature		-65		150	°C		78
Output Short Circuit Current				200	mA		78
Applied Input/Output Voltage		-0.5		4	V		78
VCC Supply Voltage (absolute maximum)	VCC	-0.5		4	V		78

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part	Material	Colour / plating	Datasheet says	Page
contacts	SUS1		operation if the WP# or HOLD# pins are tied directly to the power supply or ground). SUS1, SUS2 Bits.	12

CAD (KiCad official)

Symbol: XT25F256BWSIGT
Footprint: Package_SON:WSON-8-1EP_8x6mm_P1.27mm_EP3.4x4.3mm
3D model: WSON-8-EP(6x8), generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 0.75 mm nominal WSON height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
3D model files: xt25f256bwsigt-etched.step / xt25f256bwsigt-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); xt25f256bwsigt.step / xt25f256bwsigt.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: XTX datasheet (87 pp, sha256 a7facd3567b6c1a5, retrieved 2026-10-20, tier: lcsc)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF