CH554E from WCH Jiangsu Qin Heng, in a MSOP-10. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	P1.4/T2/CAP1/SCS/TIN2/UCC1/AIN1	bidirectional	Port 1 bit 4 general-purpose I/O. Multiplexed alternate functions: Timer2 external clock/count input (T2), Timer2 capture 1 input (CAP1), SPI slave chip-select (SCS), Touch-Key channel 2 sense (TIN2), USB type-C CC1 detection (UCC1) and ADC channel 1 analog input (AIN1). Default has internal pull-up after reset.
2	P1.5/MOSI/PWM1/TIN3/UCC2/AIN2	bidirectional	Port 1 bit 5 general-purpose I/O. Multiplexed alternate functions: SPI master-out/slave-in data (MOSI), PWM1 output, Touch-Key channel 3 sense (TIN3), USB type-C CC2 detection (UCC2) and ADC channel 2 analog input (AIN2). Default has internal pull-up after reset.
3	P1.6/MISO/RXD1/TIN4	bidirectional	Port 1 bit 6 general-purpose I/O. Multiplexed alternate functions: SPI master-in/slave-out data (MISO), UART1 receive data (RXD1) and Touch-Key channel 4 sense (TIN4). Default has internal pull-up after reset; also used as ISP programming data output.
4	P1.7/SCK/TXD1/TIN5	bidirectional	Port 1 bit 7 general-purpose I/O. Multiplexed alternate functions: SPI serial clock (SCK), UART1 transmit data (TXD1) and Touch-Key channel 5 sense (TIN5). Default has internal pull-up after reset; also used as ISP programming clock input.
5	RST/T2EX/CAP2	input	External reset input (active high). When enabled by configuration bit En_RST_RESET, driving RST high triggers a hardware reset. Alternate functions: Timer2 reload trigger (T2EX) and Timer2 capture 2 input (CAP2). Has an internal pull-down resistor.
6	P3.6/UDP	bidirectional	USB D+ signal line for the built-in USB 2.0 full-speed/low-speed transceiver (supports Host and Device modes). May alternatively be used as P3.6 GPIO. USB transceiver is USB 2.0 compliant so no external series resistor may be used on this pin when driving USB.
7	P3.7/UDM	bidirectional	USB D- signal line for the built-in USB 2.0 full-speed/low-speed transceiver (supports Host and Device modes). May alternatively be used as P3.7 GPIO. USB transceiver is USB 2.0 compliant so no external series resistor may be used on this pin when driving USB.
8	GND	power_in	Common ground / VSS return for the device.
9	VCC	power_in	Main power supply input (VDD). Accepts external 3.3 V or 5 V (nominal 2.8 V-5 V). Requires at least 0.1 µF decoupling capacitor to GND. When VCC < 3.6 V, V33 must be tied to VCC to bypass the internal LDO.
10	V33	power_in	Internal USB 3.3 V LDO output and internal USB power input. When VCC > 3.6 V this pin is the LDO output and needs at least a 0.1 µF decoupling capacitor. When VCC < 3.6 V this pin must be tied to VCC (external 3.3 V supply) with a decoupling capacitor and the internal LDO disabled via bLDO3V3_OFF.

Key specifications

Parameter	Value
Manufacturer	WCH Jiangsu Qin Heng
Package	MSOP-10
Category	MCU
Pins	10

Ordering variants

Same part, different packaging or reel option.

CH554E
CH554T
CH554G
CH554P

CAD (KiCad official)

Symbol: CH554E
Footprint: Package_SO:MSOP-10_3x3mm_P0.5mm
3D model: MSOP-10 (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: WCH Jiangsu Qin Heng datasheet (57 pp, sha256 cb2e031a170f1cab, retrieved 2026-08-17, tier: lcsc)
Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF