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Contents

README

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SDT23C712L02

TECH PUBLIC · ESD And Surge Protection (TVS/ESD) · SOT-23

SDT23C712L02 from TECH PUBLIC, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 I/O 1 passive Protected I/O line 1 with a 12V TVS to pin 3 (VRWM 12V max, VBR 13.3V min at 1mA) and a 7V TVS from pin 3 (VRWM 7V, VBR 7.5V min).
2 I/O 2 passive Protected I/O line 2 with a 12V TVS to pin 3 (VRWM 12V max, VBR 13.3V min at 1mA) and a 7V TVS from pin 3 (VRWM 7V, VBR 7.5V min).
3 GND power_in Common ground pin of the asymmetrical TVS array that both I/O diode paths return to.

Key specifications

Parameter Value
Manufacturer TECH PUBLIC
Package SOT-23
Category Circuit Protection
Pins 3

CAD (KiCad official)

  • Symbol: SDT23C712L02
  • Footprint: Package_TO_SOT_SMD:SOT-23
  • 3D model: SOT-23 (KiCad packages3D, STEP)
  • 3D model files: sdt23c712l02-etched.step / sdt23c712l02-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sdt23c712l02.step / sdt23c712l02.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: TECH PUBLIC datasheet (4 pp, sha256 dacdbf76e6eda3eb, retrieved 2026-10-09, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF