LT6600CS8-2.5#PBF from Analog Devices, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	IN-	input	Inverting filter input; signals are applied through external resistor RIN, with DC differential gain of 1580Ω/RIN.
2	VOCM	input	High-impedance DC common mode reference for the 2nd filter stage that sets the output common mode voltage; tie to VMID or an external reference and bypass with 0.01µF unless connected to a ground plane.
3	V+	power_in	Positive supply pin; bypass to V- with a 0.1µF ceramic capacitor placed close to the IC (single 3.3V or 5V supply).
4	OUT+	output	Non-inverting filter differential output that can drive a 100Ω and/or 50pF load to AC ground.
5	OUT-	output	Inverting filter differential output that can drive a 100Ω and/or 50pF load to AC ground.
6	V-	power_in	Negative supply pin (ground for single supply), fused to the lead frame for thermal conduction so it should connect to a ground plane or large metal trace; bypass with 0.1µF ceramic.
7	VMID	bidirectional	Internally biased mid-supply node (about 5.5kΩ impedance) that sets the 1st-stage output common mode; bypass with 0.01µF ceramic to V- or override with a low-impedance source.
8	IN+	input	Non-inverting filter input; signals are applied through external resistor RIN, with DC differential gain of 1580Ω/RIN.

Key specifications

Parameter	Value
Manufacturer	Analog Devices
Package	SO-8
Category	Amplifiers
Pins	8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Total Supply Voltage				11	V		2
Input Current		-10		10	mA	Printed as ±10mA, Note 8 (inputs protected by back-to-back diodes)	2
Operating Temperature Range		-40		85	°C	Note 6	2
Specified Temperature Range (LT6600C-2.5, CS8 grade)		0		70	°C	Note 7, C grade guaranteed 0°C to 70°C	2
Junction Temperature	TJMAX			150	°C		2
Storage Temperature Range		-65		150	°C		2
Lead Temperature (Soldering)				300	°C	10 sec	2
Filter Gain, VS = 3V (DC to 260kHz)		-0.5	0.1	0.4	dB	VIN = 2VP-P, fIN = DC to 260kHz	2
Filter Gain, VS = 3V (700kHz rel. 260kHz)		-0.15	0	0.1	dB	VIN = 2VP-P, fIN = 700kHz (Gain Relative to 260kHz)	2
Filter Gain, VS = 3V (1.9MHz rel. 260kHz)		-0.2	0.2	0.6	dB	VIN = 2VP-P, fIN = 1.9MHz (Gain Relative to 260kHz)	2
Filter Gain, VS = 3V (2.2MHz rel. 260kHz)		-0.6	0.1	0.5	dB	VIN = 2VP-P, fIN = 2.2MHz (Gain Relative to 260kHz)	2
Filter Gain, VS = 3V (2.5MHz rel. 260kHz)		-2.1	-0.9	0	dB	VIN = 2VP-P, fIN = 2.5MHz (Gain Relative to 260kHz)	3
Filter Gain, VS = 5V (DC to 260kHz)		-0.5	-0.1	0.4	dB	VIN = 2VP-P, fIN = DC to 260kHz	3
Filter Gain, VS = 5V (700kHz rel. 260kHz)		-0.15	0	0.1	dB	VIN = 2VP-P, fIN = 700kHz (Gain Relative to 260kHz)	3
Filter Gain, VS = 5V (2.2MHz rel. 260kHz, first row)		-0.2	0.2	0.6	dB	VIN = 2VP-P, fIN = 2.2MHz (Gain Relative to 260kHz)	3
Filter Gain, VS = 5V (2.2MHz rel. 260kHz, second row)		-0.6	0.1	0.5	dB	VIN = 2VP-P, fIN = 2.2MHz (Gain Relative to 260kHz)	3
Filter Gain, VS = 5V (2.5MHz rel. 260kHz)		-2.1	-0.9	0	dB	VIN = 2VP-P, fIN = 2.5MHz (Gain Relative to 260kHz)	3
Filter Gain, VS = ±5V (DC to 260kHz)		-0.6	-0.1	0.4	dB	VIN = 2VP-P, fIN = DC to 260kHz	3
Filter Gain, RIN = 402Ω, VS = 3V		11.3	11.8	12.3	dB	VIN = 0.5VP-P, fIN = DC to 260kHz, VS = 3V	3
Filter Gain, RIN = 402Ω, VS = 5V		11.3	11.8	12.3	dB	VIN = 0.5VP-P, fIN = DC to 260kHz, VS = 5V	3
Filter Gain, RIN = 402Ω, VS = ±5V		11.2	11.7	12.2	dB	VIN = 0.5VP-P, fIN = DC to 260kHz, VS = ±5V	3
Output Common Mode Offset (with Respect to Pin 2), VS = 3V		-25	10	45	mV	VS = 3V	3
Output Common Mode Offset (with Respect to Pin 2), VS = 5V		-30	5	45	mV	VS = 5V	3
Output Common Mode Offset (with Respect to Pin 2), VS = ±5V		-55	-10	35	mV	VS = ±5V	3
VMID Input Resistance		4.3	5.7	7.7	kΩ	l (over full operating temperature range)	3
Filter Gain Temperature Coefficient			780		ppm/°C	fIN = 260kHz, VIN = 2VP-P	3
Noise (input referred)			51		μVRMS	Noise BW = 10kHz to 2.5MHz	3
Distortion, 2nd Harmonic			95		dBc	1MHz, 1VRMS, RL = 800Ω	3
Distortion, 3rd Harmonic			88		dBc	1MHz, 1VRMS, RL = 800Ω	3
Differential Offset Drift			10		μV/°C		3
Thermal Resistance, Junction-to-Ambient (S8 package)	θJA		100		°C/W	S8 package, TJMAX = 150°C (no copper area stated in this line)	2
Thermal Resistance, Junction-to-Ambient (S8, 1100 mm² top / 1100 mm² back)	θJA		65		°C/W	Topside 1100 mm², backside 1100 mm², board area 2500 mm²	12
Thermal Resistance, Junction-to-Ambient (S8, 330 mm² top / 330 mm² back)	θJA		85		°C/W	Topside 330 mm², backside 330 mm², board area 2500 mm²	12
Thermal Resistance, Junction-to-Ambient (S8, 35 mm² top / 35 mm² back)	θJA		95		°C/W	Topside 35 mm², backside 35 mm², board area 2500 mm²	12
Thermal Resistance, Junction-to-Ambient (S8, 35 mm² top / 0 back)	θJA		100		°C/W	Topside 35 mm², backside 0 mm², board area 2500 mm²	12
Thermal Resistance, Junction-to-Ambient (S8, no copper)	θJA		105		°C/W	Topside 0 mm², backside 0 mm², board area 2500 mm²	12

CAD (KiCad official)

Symbol: LT6600CS8-2.5#PBF
Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
3D model: SO-8 (KiCad packages3D, STEP)
3D model files: lt6600cs8-2-5-pbf-etched.step / lt6600cs8-2-5-pbf-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lt6600cs8-2-5-pbf.step / lt6600cs8-2-5-pbf.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Analog Devices datasheet (16 pp, sha256 efb4837130193b8b, retrieved 2026-10-30, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

LT6600CS8-2.5#PBF

Verified LT6600CS8-2.5#PBF

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3D Model

Symbol & Footprint

Schematic Symbol

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