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Contents

README

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FDS8858CZ

onsemi · MOSFETs · SO-8

FDS8858CZ from onsemi, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S1 passive Source terminal of the Q1 N-channel MOSFET; Q1 is rated VDS 30 V, VGS ±20 V, and 8.6 A continuous drain current at TA = 25°C.
2 G1 input Gate terminal of the Q1 N-channel MOSFET; the datasheet specifies VGS of ±20 V maximum for Q1.
3 S2 passive Source terminal of the Q2 P-channel MOSFET; Q2 is rated VDS -30 V, VGS ±25 V, and -7.3 A continuous drain current at TA = 25°C.
4 G2 input Gate terminal of the Q2 P-channel MOSFET; the datasheet specifies VGS of ±25 V maximum for Q2.
5 D2 passive Drain terminal of the Q2 P-channel MOSFET; Q2 drain is rated -30 V to source.
6 D2 passive Drain terminal of the Q2 P-channel MOSFET (second drain pin, internally common with pin 5); Q2 drain is rated -30 V to source.
7 D1 passive Drain terminal of the Q1 N-channel MOSFET; Q1 drain is rated 30 V to source.
8 D1 passive Drain terminal of the Q1 N-channel MOSFET (second drain pin, internally common with pin 7); Q1 drain is rated 30 V to source.

Key specifications

Parameter Value
Manufacturer onsemi
Package SO-8
Category Transistors/Thyristors
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
VDS Drain to Source Voltage (Q1 N-Channel) VDS 30 V 2
VDS Drain to Source Voltage (Q2 P-Channel) VDS -30 V 2
VGS Gate to Source Voltage (Q1 N-Channel) VGS -20 20 V 2
VGS Gate to Source Voltage (Q2 P-Channel) VGS -25 25 V 2
Drain Current Continuous (Q1 N-Channel) ID 8.6 A TA = 25°C 2
Drain Current Continuous (Q2 P-Channel) ID -7.3 A TA = 25°C 2
Drain Current Pulsed (Q1 N-Channel) ID 20 A Pulsed 2
Drain Current Pulsed (Q2 P-Channel) ID -20 A Pulsed 2
Single Pulse Avalanche Energy (Q1 N-Channel) EAS 50 mJ Note 3 2
Single Pulse Avalanche Energy (Q2 P-Channel) EAS 11 mJ Note 3 2
Power Dissipation for Dual Operation PD 2 W 2
Power Dissipation for Single Operation PD 1.6 W TA = 25°C (Note 1a) 2
Power Dissipation for Single Operation PD 0.9 W TA = 25°C (Note 1c) 2
Operating and Storage Junction Temperature Range TJ, TSTG -55 150 °C 2
Drain to Source Breakdown Voltage (Q1 N-Channel) BVDSS 30 V ID = 250 μA, VGS = 0V 3
Drain to Source Breakdown Voltage (Q2 P-Channel) BVDSS -30 V ID = -250 μA, VGS = 0V 3
Zero Gate Voltage Drain Current (Q1 N-Channel) IDSS 1 μA VDS = 24V, VGS = 0V 3
Zero Gate Voltage Drain Current (Q2 P-Channel) IDSS -1 μA VDS = -24V, VGS = 0V 3
Gate to Source Leakage Current (Q1 N-Channel) IGSS -10 10 μA VGS = ±20V, VDS = 0V 3
Gate to Source Leakage Current (Q2 P-Channel) IGSS -10 10 μA VGS = ±25V, VDS = 0V 3
Gate to Source Threshold Voltage (Q1 N-Channel) VGS(th) 1 1.6 3 V VGS = VDS, ID = 250 μA 3
Gate to Source Threshold Voltage (Q2 P-Channel) VGS(th) -1 -2.1 -3 V VGS = VDS, ID = -250 μA 3
Static Drain to Source On Resistance (Q1 N-Channel) rDS(on) 12.4 17 mΩ VGS = 10V, ID = 8.6A 3
Static Drain to Source On Resistance (Q1 N-Channel) rDS(on) 15.2 20 mΩ VGS = 4.5V, ID = 7.3A 3
Static Drain to Source On Resistance (Q1 N-Channel, hot) rDS(on) 17.7 24.3 mΩ VGS = 10V, ID = 8.6A, TJ = 125°C 3
Static Drain to Source On Resistance (Q2 P-Channel) rDS(on) 17.1 20.5 mΩ VGS = -10V, ID = -7.3A 3
Static Drain to Source On Resistance (Q2 P-Channel) rDS(on) 26.5 34.5 mΩ VGS = -4.5V, ID = -5.6A 3
Static Drain to Source On Resistance (Q2 P-Channel, hot) rDS(on) 24 28.8 mΩ VGS = -10V, ID = -7.3A, TJ = 125°C 3
Input Capacitance (Q1 N-Channel) Ciss 905 1205 pF VDS = 15V, VGS = 0V, f = 1MHZ 3
Input Capacitance (Q2 P-Channel) Ciss 1675 2230 pF VDS = -15V, VGS = 0V, f = 1MHZ 3
Output Capacitance (Q1 N-Channel) Coss 180 240 pF 3
Output Capacitance (Q2 P-Channel) Coss 290 390 pF 3
Rise Time (Q1 N-Channel) tr 3 10 ns 3
Rise Time (Q2 P-Channel) tr 10 20 ns 3
Turn-Off Delay Time (Q1 N-Channel) td(off) 19 35 ns 3
Turn-Off Delay Time (Q2 P-Channel) td(off) 33 53 ns 3
Fall Time (Q1 N-Channel) tf 3 10 ns 3
Fall Time (Q2 P-Channel) tf 16 29 ns 3
Total Gate Charge (Q1 N-Channel) Qg(TOT) 17 24 nC VGS = 10V, VDD = 15V, ID = 8.6A 3
Total Gate Charge (Q2 P-Channel) Qg(TOT) 33 46 nC VGS = -10V, VDD = -15V, ID = -7.3A 3
Source to Drain Diode Forward Voltage (Q1 N-Channel) VSD 0.8 1.2 V VGS = 0V, IS = 8.6A (Note 2) 4
Source to Drain Diode Forward Voltage (Q2 P-Channel) VSD 0.9 -1.2 V VGS = 0V, IS = -7.3A (Note 2) 4
Reverse Recovery Time (Q1 N-Channel) trr 25 38 ns IF = 8.6A, di/dt = 100A/μs 4
Reverse Recovery Time (Q2 P-Channel) trr 28 42 ns IF = -7.3A, di/dt = 100A/μs 4
Reverse Recovery Charge (Q1 N-Channel) Qrr 19 29 nC 4
Reverse Recovery Charge (Q2 P-Channel) Qrr 22 33 nC 4
Thermal Resistance, Junction to Case RθJC 40 °C/W Note 1 2
Thermal Resistance, Junction to Ambient RθJA 78 °C/W Note 1a: 0.5 in² pad of 2 oz copper 2
Thermal Resistance, Junction to Ambient RθJA 125 °C/W Note 1b: 0.02 in² pad of 2 oz copper 4
Thermal Resistance, Junction to Ambient RθJA 135 °C/W Note 1c: minimum pad 4

CAD (KiCad official)

  • Symbol: FDS8858CZ
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SO-8 (KiCad packages3D, STEP)
  • 3D model files: fds8858cz-etched.step / fds8858cz-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); fds8858cz.step / fds8858cz.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (11 pp, sha256 914e27009925692c, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF