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PIC10F220T-E
Public Made by Adomby adom
Microchip Tech Microcontrollers (MCU/MPU/SOC), SOT-23-6. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownPIC10F220T-E
Microchip Tech · Microcontrollers (MCU/MPU/SOC) · SOT-23-6
PIC10F220T-E from Microchip Tech, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GP0/AN0/ICSPDAT | bidirectional | Bidirectional I/O pin that can be software-programmed for an internal weak pull-up and wake-up from Sleep on pin change, and also serves as analog input AN0 and the ICSP data pin (ICSPDAT). |
| 2 | VSS | power_in | Ground reference for logic and I/O pins. |
| 3 | GP1/AN1/ICSPCLK | bidirectional | Bidirectional I/O pin that can be software-programmed for an internal weak pull-up and wake-up from Sleep on pin change, and also serves as analog input AN1 and the ICSP clock pin (ICSPCLK). |
| 4 | GP2/T0CKI/FOSC4 | bidirectional | Bidirectional I/O pin that also serves as the clock input to TMR0 (T0CKI) and the Oscillator/4 output (FOSC4) when enabled. |
| 5 | VDD | power_in | Positive supply for logic and I/O pins; the device operates from 2.0 V to 5.5 V. |
| 6 | GP3/MCLR/VPP | input | Input-only pin that can be configured as the active-low Master Clear (MCLR) Reset input, where VDD must not be exceeded during normal operation, or as the programming voltage input (VPP), and can be software-programmed for an internal weak pull-up and wake-up from Sleep on pin change when used as GP3. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SOT-23-6 |
| Category | Embedded Processors & Controllers |
| Pins | 6 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage | VDD | 2 | 5.5 | V | See Figure 10-1 | 56 | |
| Operating Temperature (extended) | TA | -40 | 125 | °C | Extended temperature range (-E) | 56 | |
| RAM Data Retention Voltage | VDR | 1.5 | V | Device in Sleep mode | 56 | ||
| Supply Current (IDD) | IDD | 175 | 275 | µA | VDD = 2.0V, Fosc = 4 MHz | 56 | |
| Supply Current (IDD) | IDD | 0.625 | 1.1 | mA | VDD = 5.0V, Fosc = 4 MHz | 56 | |
| Supply Current (IDD) | IDD | 250 | 400 | µA | VDD = 2.0V, Fosc = 8 MHz | 56 | |
| Supply Current (IDD) | IDD | 0.8 | 1.5 | mA | VDD = 5.0V, Fosc = 8 MHz | 56 | |
| Power-down Current (IPD) | IPD | 0.1 | 9 | µA | VDD = 2.0V | 56 | |
| Power-down Current (IPD) | IPD | 1 | 15 | µA | VDD = 5.0V | 56 | |
| WDT Current (IWDT) | IWDT | 1 | 18 | µA | VDD = 2.0V | 56 | |
| WDT Current (IWDT) | IWDT | 7 | 22 | µA | VDD = 5.0V | 56 | |
| Input Low Voltage, I/O ports with TTL buffer | VIL | 0.8 | V | For all 4.5 ≤ VDD ≤ 5.5V | 57 | ||
| Input High Voltage, I/O ports with TTL buffer | VIH | 2 | V | 4.5 ≤ VDD ≤ 5.5V | 57 | ||
| Input Leakage Current, I/O ports | IIL | -1 | 0.1 | 1 | µA | Vss ≤ VPIN ≤ VDD, pin at high-impedance | 57 |
| Input Leakage Current, GP3/MCLR | IIL | -5 | 0.7 | 5 | µA | Vss ≤ VPIN ≤ VDD | 57 |
| GPIO weak pull-up current | IPUR | 50 | 250 | 400 | µA | VDD = 5V, VPIN = VSS | 57 |
| Output Low Voltage, I/O ports (extended) | VOL | 0.6 | V | IOL = 7.0 mA, VDD = 4.5V, -40C to +125C | 57 | ||
| Capacitive loading, all I/O pins | 50 | pF | 57 | ||||
| Internal calibrated INTOSC frequency (1% tolerance) | FOSC | 3.96 | 4 | 4.04 | MHz | VDD = 3.5V @ 25C | 59 |
| Internal calibrated INTOSC frequency (5% tolerance) | FOSC | 3.8 | 4 | 4.2 | MHz | 2.0V ≤ VDD ≤ 5.5V, -40C ≤ TA ≤ +125C (extended) | 59 |
| MCLR Pulse Width (low) | TMCL | 5 | µs | VDD = 5.0V | 60 | ||
| Watchdog Timer Time-out Period (no prescaler) | TWDT | 10 | 18 | 31 | ms | VDD = 5.0V (Extended) | 60 |
| Device Reset Timer Period (standard) | TDRT | 0.6 | 1.125 | 1.95 | ms | VDD = 5.0V (Extended) | 60 |
| I/O High-impedance from MCLR low | TIOZ | 2 | µs | 60 | |||
| T0CKI High Pulse Width | Tt0H | 10 | ns | With Prescaler | 61 | ||
| T0CKI Low Pulse Width | Tt0L | 10 | ns | With Prescaler | 61 | ||
| A/D Resolution | NR | 8 | bits | 62 | |||
| A/D Integral Error | EIL | -1.5 | 1.5 | LSb | 62 | ||
| A/D Differential Error | EDL | -1 | 1.5 | LSb | 62 | ||
| A/D Full-scale Range | EFS | 2 | 5.5 | V | 62 | ||
| A/D Offset Error | EOFF | -1.5 | 1.5 | LSb | 62 | ||
| A/D Gain Error | EGN | -1.5 | 1.5 | LSb | 62 | ||
| Recommended impedance of analog voltage source | ZAIN | 10 | kΩ | 62 | |||
| A/D Conversion Current (additional) | IAD | 120 | 150 | µA | 2.0V | 62 | |
| A/D Conversion Current (additional) | IAD | 200 | 250 | µA | 5.0V | 62 | |
| GP0/GP1 weak pull-up resistance | 73 | 105 | 186 | K | VDD = 2.0V, Temperature = -40C | 58 | |
| GP0/GP1 weak pull-up resistance | 86 | 132 | 190 | K | VDD = 2.0V, Temperature = 125C | 58 | |
| GP0/GP1 weak pull-up resistance | 15 | 21 | 33 | K | VDD = 5.5V, Temperature = -40C | 58 | |
| GP0/GP1 weak pull-up resistance | 23 | 29 | 35 | K | VDD = 5.5V, Temperature = 125C | 58 | |
| GP3 weak pull-up resistance | 63 | 81 | 96 | K | VDD = 2.0V, Temperature = -40C | 58 | |
| GP3 weak pull-up resistance | 86 | 100 | 119 | K | VDD = 2.0V, Temperature = 125C | 58 | |
| GP3 weak pull-up resistance | 16 | 20 | 22 | K | VDD = 5.5V, Temperature = -40C | 58 | |
| GP3 weak pull-up resistance | 26 | 27 | 29 | K | VDD = 5.5V, Temperature = 125C | 58 | |
| Ambient temperature under bias | -40 | 125 | °C | 53 | |||
| Storage temperature | -65 | 150 | °C | 53 | |||
| Voltage on VDD with respect to VSS | VDD | 0 | 6.5 | V | 53 | ||
| Voltage on MCLR with respect to VSS | VMCLR | 0 | 13.5 | V | 53 | ||
| Voltage on all other pins with respect to VSS | -0.3 | V | 53 | ||||
| Input clamp current | IIK | 20 | mA | VI < 0 or VI > VDD | 53 | ||
| Output clamp current | IOK | 20 | mA | VO < 0 or VO > VDD | 53 | ||
| Max. output current sunk by any I/O pin | 25 | mA | 53 | ||||
| Max. output current sourced by any I/O pin | 25 | mA | 53 |
CAD (KiCad official)
- Symbol:
PIC10F220T-E - Footprint:
Package_TO_SOT_SMD:SOT-23-6 - 3D model: SOT-23-6 (KiCad packages3D, STEP)
- 3D model files:
pic10f220t-e-etched.step/pic10f220t-e-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);pic10f220t-e.step/pic10f220t-e.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (88 pp, sha256
7d42622fea72d272, retrieved 2026-10-20, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).