A 3-to-8 line decoder/demultiplexer in high-speed CMOS, SOIC-16. Three binary select inputs (A, B, C) drive eight mutually exclusive active-low outputs (Y0-Y7): the addressed output goes low while the other seven stay high. Three enable inputs (G1 active-high, G2A and G2B active-low) gate the whole device, which makes it easy to chain several for wider address decoding or to use as a 1-of-8 demultiplexer for a data line. Runs 2-6 V.

Pinout

Pin	Name	Type	Function
1	A	input	Select input A (least significant bit of the 3-bit binary address selecting which Y output is asserted low).
2	B	input	Select input B (middle bit of the 3-bit binary address).
3	C	input	Select input C (most significant bit of the 3-bit binary address).
4	G2A	input	Active-low enable A. Must be low (together with G2B low and G1 high) to enable outputs; otherwise all Y outputs are forced high.
5	G2B	input	Active-low enable B. Must be low (together with G2A low and G1 high) to enable outputs.
6	G1	input	Active-high enable. Must be high (together with G2A and G2B low) to enable outputs.
7	Y7	output	Decoded output 7 (most significant, active low). Asserts low when enabled and CBA = 111. Drive capability ±4 mA at VCC = 5 V.
8	GND	power_in	Ground reference (0 V).
9	Y6	output	Decoded output 6 (active low). Asserts low when enabled and CBA = 110.
10	Y5	output	Decoded output 5 (active low). Asserts low when enabled and CBA = 101.
11	Y4	output	Decoded output 4 (active low). Asserts low when enabled and CBA = 100.
12	Y3	output	Decoded output 3 (active low). Asserts low when enabled and CBA = 011.
13	Y2	output	Decoded output 2 (active low). Asserts low when enabled and CBA = 010.
14	Y1	output	Decoded output 1 (active low). Asserts low when enabled and CBA = 001.
15	Y0	output	Decoded output 0 (least significant, active low). Asserts low when enabled and CBA = 000.
16	VCC	power_in	Positive supply voltage, 2 V to 6 V (nominal 5 V).

Key specifications

Parameter	Value
Type	3-to-8 decoder / demultiplexer
Select inputs	3 (A/B/C)
Outputs	8 active-low (Y0-Y7)
Enables	G1 (high) + G2A/G2B (low)
Logic family	HC (high-speed CMOS)
Supply voltage	2-6 V
Package	SOIC-16
Body (L×W×H)	9.9 × 3.9 × 1.75 mm

Ordering variants

Same part, different packaging or reel option.

SN74HC138D (SOIC-16, tube)
SN74HC138DR (SOIC-16, tape & reel)

CAD (KiCad official)

Symbol: 74xx:74HC138
Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
3D model: SOIC-16 (KiCad packages3D)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (35 pp, sha256 ba6cab88a44c1c9a, retrieved 2026-08-17, tier: manufacturer)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF