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Contents

README

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TPESD9N5B

TECH PUBLIC · ESD Protection Devices · DFN1006-2

TPESD9N5B from TECH PUBLIC, in a DFN1006-2. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1 passive Terminal 1 of the 1-line bidirectional TVS diode (two back-to-back diodes between pins 1 and 2), rated for a reverse working voltage VRWM of 5 V max and a breakdown voltage VBR of 5.6 V min to 8.4 V max at IT = 1 mA.
2 2 passive Terminal 2 of the 1-line bidirectional TVS diode (two back-to-back diodes between pins 1 and 2), with the same ratings as pin 1: VRWM 5 V max, VBR 5.6 V to 8.4 V, and typical junction capacitance of 15 pF at VR = 0 V, f = 1 MHz.

Key specifications

Parameter Value
Manufacturer TECH PUBLIC
Package DFN1006-2
Category TVS/Fuse/Board Level Protection
Pins 2

CAD (KiCad official)

  • Symbol: TPESD9N5B
  • Footprint: Diode_SMD:D_SOD-882
  • 3D model: DFN1006-2 (KiCad packages3D, STEP)
  • 3D model files: tpesd9n5b-etched.step / tpesd9n5b-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tpesd9n5b.step / tpesd9n5b.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: TECH PUBLIC datasheet (4 pp, sha256 f0d0ad0ef1ed8570, retrieved 2026-10-21, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF