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TPS76333QDBVRG4Q1
Public Made by Adomby adom
Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTPS76333QDBVRG4Q1
Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5
TPS76333QDBVRG4Q1 from Texas Instruments, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IN | power_in | Input supply pin; the datasheet recommends a capacitor of at least 1µF from this pin to GND, with the effective capacitance kept above 1µF over temperature and bias. |
| 2 | GND | power_in | Ground reference pin for the regulator. |
| 3 | EN | input | Logic enable: driving EN high enables the device and driving it low disables it, with the high and low thresholds given in the Electrical Characteristics table; if unused, connect it to VIN (new chip). |
| 4 | NC | unconnected | No connection on the fixed-voltage option; this pin is the FB feedback pin only on the adjustable device. |
| 5 | OUT | power_out | Regulator output; the datasheet requires an output capacitor of at least 2.2µF from this pin to GND, with the ESR kept within the stated range for stability. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOT-23-5 |
| Category | Power Management (PMIC) |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output voltage (old die) | VOUT | 3.234 | 3.3 | 3.366 | V | IOUT = 1mA to 100mA, TJ = 25°C | 7 |
| Output voltage (old die) | VOUT | 3.201 | 3.3 | 3.399 | V | IOUT = 1mA to 100mA | 7 |
| Output voltage (old die) | VOUT | 3.218 | 3.3 | 3.382 | V | IOUT = 1mA to 150mA, TJ = 25°C | 7 |
| Output voltage (old die) | VOUT | 3.177 | 3.3 | 3.423 | V | IOUT = 1mA to 150mA | 7 |
| Output voltage (new die) | VOUT | 3.234 | 3.3 | 3.366 | V | IOUT = 1mA to 100mA, TJ = 25°C | 7 |
| Output voltage (new die) | VOUT | 3.20925 | 3.3 | 3.39075 | V | IOUT = 1mA to 100mA | 7 |
| Quiescent current (GND current), old die | IQ | 85 | 100 | µA | IOUT = 1mA to 150mA, TJ = 25°C | 7 | |
| Quiescent current (GND current), old die | IQ | 140 | µA | IOUT = 1mA to 150mA | 7 | ||
| Quiescent current (GND current), new die | IQ | 65 | 125 | µA | IOUT = 0mA | 7 | |
| Quiescent current (GND current), new die | IQ | 765 | 890 | µA | IOUT = 1mA to 150mA, TJ = 25°C | 7 | |
| Quiescent current (GND current), new die | IQ | 1120 | µA | IOUT = 1mA to 150mA | 7 | ||
| Output voltage line regulation (old die) | ΔVOUT/VOUT | 0.04 | 0.07 | %/V | VOUT(NOM) +1.0V ≤ VIN ≤ 10V, VIN ≥ 3.5V, TJ = 25°C | 7 | |
| Output voltage line regulation (old die) | ΔVOUT/VOUT | 0.1 | %/V | VOUT(NOM) +1.0V ≤ VIN ≤ 10V, VIN ≥ 3.5V | 7 | ||
| Output voltage line regulation (new die) | ΔVOUT/VOUT | 0.01 | %/V | VOUT(NOM) +1.0V ≤ VIN ≤ 10V, VIN ≥ 3.5V, TJ = 25°C | 7 | ||
| Output current limit (old die) | ICL | 0.5 | 0.8 | 1.5 | A | VOUT = 0V | 7 |
| Output current limit (new die) | ICL | 0.8 | 1.05 | A | 7 | ||
| Junction-to-ambient thermal resistance RθJA (old die, SOT-23 5-pin) | RθJA | 205.2 | °C/W | 5 | |||
| Junction-to-ambient thermal resistance RθJA (new die, SOT-23 5-pin) | RθJA | 178.6 | °C/W | 5 | |||
| Junction-to-case (top) thermal resistance RθJC(top) (old die) | RθJC(top) | 11.93 | °C/W | 5 | |||
| Junction-to-case (top) thermal resistance RθJC(top) (new die) | RθJC(top) | 77.9 | °C/W | 5 | |||
| Junction-to-board thermal resistance RθJB (old die) | RθJB | 34.8 | °C/W | 5 | |||
| Junction-to-board thermal resistance RθJB (new die) | RθJB | 47.2 | °C/W | 5 | |||
| Junction-to-top characterization parameter ΨJT (old die) | ΨJT | 12.2 | °C/W | 5 | |||
| Junction-to-top characterization parameter ΨJT (new die) | ΨJT | 15.9 | °C/W | 5 | |||
| Junction-to-board characterization parameter ΨJB (old die) | ΨJB | 33.9 | °C/W | 5 | |||
| Junction-to-board characterization parameter ΨJB (new die) | ΨJB | 46.9 | °C/W | 5 |
CAD (KiCad official)
- Symbol:
TPS76333QDBVRG4Q1 - Footprint:
Package_TO_SOT_SMD:SOT-23-5 - 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files:
tps76333qdbvrg4q1-etched.step/tps76333qdbvrg4q1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps76333qdbvrg4q1.step/tps76333qdbvrg4q1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (42 pp, sha256
7e26e0f10e602be2, retrieved 2026-10-12, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).