component
SXL1509-12E1
Public Made by Adomby adom
JSMSEMI DC-DC Converters, SOP-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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Contents
README
markdownSXL1509-12E1
JSMSEMI · DC-DC Converters · SOP-8
SXL1509-12E1 from JSMSEMI, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Positive supply voltage input for the IC switching regulator. Absolute max +40V; operating 4.5V-40V (15V-40V for the -12V fixed version). Requires a local bypass capacitor to supply switching currents and minimize voltage transients. |
| 2 | Output | output | Power switching output (internal 3A NPN switch emitter). Voltage swings between (+VIN − VSAT) and approximately −0.5V with a duty cycle of ~VOUT/VIN. Connects to the external inductor and Schottky catch diode; PCB copper area at this node should be minimized to reduce EMI coupling. |
| 3 | FB | input | Output voltage feedback control input. Senses the regulated output voltage (directly for fixed-V versions, or via an R1/R2 divider for the ADJ version where VFB = 1.23V typ, VOUT = VFB·(1+R1/R2)). Feedback bias current ~50nA (adjustable version). |
| 4 | EN | input | ON/OFF shutdown logic input. Pulling EN below ~1.3V (VIL ≤ 0.6V) enables the regulator; pulling above ~1.3V (VIH ≥ 2.0V) shuts it down and drops supply current to ~150µA (standby IQ typ 50µA). Tie to GND if shutdown is not used. Absolute max −0.3V to VIN. |
| 5 | GND | power_in | Circuit ground. Pins 5, 6, 7, and 8 are all tied to GND on the SOP-8 package and should all be connected to the ground plane to provide the return path and improve thermal dissipation (θJA ≈ 70 °C/W with ~3 in² copper). |
| 6 | GND | power_in | Circuit ground. Tie to the same ground plane as pins 5/7/8; multiple GND pins also aid heat conduction out of the package. |
| 7 | GND | power_in | Circuit ground. Tie to the same ground plane as pins 5/6/8. |
| 8 | GND | power_in | Circuit ground. Tie to the same ground plane as pins 5/6/7 for lowest impedance return and best thermal performance. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | JSMSEMI |
| Package | SOP-8 |
| Category | PMIC |
| Pins | 8 |
Ordering variants
Same part, different packaging or reel option.
SXL1509-12E1
CAD (KiCad official)
- Symbol:
SXL1509-12E1 - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
3D model downloads
Two STEP files. Same geometry, different body top:
| File | Size | Use it when |
|---|---|---|
sxl1509-12e1.step |
122 KB | You want the bare part, or you mark your own boards. |
sxl1509-12e1-etched.step |
2.2 MB | You want the part with SXL1509-12E1 already on it. |
The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 546 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: JSMSEMI datasheet (9 pp, sha256
b150b49cc114c141, retrieved 2026-08-17, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).