component
TPS54160DGQR
Public Unreviewedby Ray
Texas Instruments DC-DC Converters, MSOP-10-EP. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTPS54160DGQR
Texas Instruments · DC-DC Converters · MSOP-10-EP
TPS54160DGQR from Texas Instruments, in a MSOP-10-EP. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | BOOT | output | Bootstrap capacitor node. A bootstrap capacitor is required between BOOT and PH to drive the internal high-side MOSFET gate. If the BOOT-PH voltage falls below the minimum, switching is inhibited until the capacitor is refreshed. Absolute max BOOT = 73 V, BOOT-PH = 8 V. |
| 2 | VIN | power_in | Input supply voltage, 3.5 V to 60 V. Bypass locally with a low-ESR ceramic capacitor to GND. |
| 3 | EN | input | Enable pin with internal pull-up current source. Pull below 1.2 V to disable; float to enable. Two external resistors can be used to set an adjustable input undervoltage lockout with hysteresis. Absolute max 5 V. |
| 4 | SS/TR | input | Slow-start and tracking pin. An external capacitor to GND sets the output rise time (charge current ~2 µA). Because the SS/TR voltage overrides the internal 0.8-V reference when lower, this pin can be used for output tracking/sequencing. |
| 5 | RT/CLK | bidirectional | Resistor timing and external clock input. Connect an external resistor to GND to set switching frequency (300 kHz to 2.5 MHz in RT mode). When driven above the PLL upper threshold, the pin becomes a synchronization clock input (300 kHz to 2.2 MHz). If clock edges stop, the device reverts to the resistor-set frequency. |
| 6 | PWRGD | output | Open-drain Power Good output. Asserts low when the output voltage is out of the 93% to 107% window, or during thermal shutdown, dropout, over-voltage, or EN shutdown. Requires an external pull-up (absolute max 6 V, sink limit 10 mA). |
| 7 | VSENSE | input | Inverting input of the transconductance (gm) error amplifier. Connect to the resistor divider from the output that sets the regulated voltage; the internal reference is 0.8 V (0.792-0.808 V at 25°C). |
| 8 | COMP | output | Error amplifier output and input to the peak current-mode PWM comparator. Connect an external RC compensation network from COMP to GND to stabilize the control loop. |
| 9 | GND | power_in | Device ground. Must be electrically tied to the exposed PowerPAD for proper operation. |
| 10 | PH | power_out | Switch node. Source of the internal high-side power MOSFET; connect to the external inductor and rectifier diode. Rated -0.6 V to 65 V (-2 V to 65 V for 10-ns transients). |
| 11 | POWERPAD | passive | Exposed thermal pad on the bottom of the package. Must be electrically connected to GND on the PCB, and to a copper thermal area for proper thermal performance. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | MSOP-10-EP |
| Category | PMIC |
| Pins | 11 |
Ordering variants
Same part, different packaging or reel option.
TPS54160DGQR
CAD (KiCad official)
- Symbol:
TPS54160DGQR - Footprint:
Package_SO:MSOP-10-1EP_3x3mm_P0.5mm_EP1.68x1.88mm - 3D model: MSOP-10-EP (KiCad packages3D, STEP)
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (47 pp, sha256
70a14970ca08cad0, retrieved 2026-08-17, tier: manufacturer) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).