component
WL9005D4-09
Public Made by Adomby adom
WPMtek(Wei Pan Microelectronics) Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, DFN1x1-4L. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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Contents
README
markdownWL9005D4-09
WPMtek(Wei Pan Microelectronics) · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · DFN1x1-4L
WL9005D4-09 from WPMtek(Wei Pan Microelectronics), in a DFN1x1-4L. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VOUT | power_out | Regulated output voltage pin, 0.8V to 5.0V, up to 500mA, requires an output capacitor of 1µF or more (X7R/X5R ceramic recommended). |
| 2 | GND | power_in | Ground pin; input and output capacitor grounds should return to it with wide, short copper traces. |
| 3 | EN | input | Enable control input with VCEH high threshold of 1.2V min and VCEL low threshold of 0.4V max, absolute maximum -0.3V to 9V. |
| 4 | VIN | power_in | Power supply input with operating range 2.0V to 7.0V (absolute maximum -0.3V to 9V), decoupled with a 1µF or larger ceramic capacitor close to the pin. |
| 5 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | WPMtek(Wei Pan Microelectronics) |
| Package | DFN1x1-4L |
| Category | Power Management (PMIC) |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Voltage | VIN | 2 | 7 | V | 5 | ||
| Quiescent Current | IQ | 0.3 | 0.5 | µA | VIN >VOUTNOM , VIN=EN, IOUT =0mA | 5 | |
| Shutdown Current | ISHDN | 0 | 0.1 | µA | EN=0 V , VOUT =0 V | 5 | |
| Output Current | IOUT | 500 | mA | VIN = VOUTNOM +1V | 5 | ||
| Dropout Voltage | VDROP | 600 | 750 | mV | IOUT =500mA, VOUT =3.3V | 5 | |
| Dropout Voltage | VDROP | 100 | mV | IOUT =100mA, VOUT =3.3V | 5 | ||
| Load Regulation | ΔVLOAD | 5 | 20 | mV | VIN = VOUTNOM +1V, 1mA≦ IOUT ≦100mA | 5 | |
| EN High Voltage | VCEH | 1.2 | V | CE High Voltage | 5 | ||
| EN Low Voltage | VCEL | 0.4 | V | CE Low Voltage | 5 | ||
| Line Regulation | ΔVLINE | 0.05 | % / V | IOUT =10mA, VOUTNOM +1.0V ≦ VIN ≦7V | 5 | ||
| EN Pin Current | IEN | 0.01 | µA | 5 | |||
| Current Limit | ILIMIT | 650 | mA | 5 | |||
| Short Current | ISHORT | 100 | mA | VOUT = GND | 5 | ||
| Output Noise Voltage | VON | 100 | µVrms | VOUT=3.3V , IOUT =200mA, BW = 100Hz~10KHz | 5 | ||
| Power Supply Rejection Rate | PSRR | 70 | dB | IOUT =100mA, VOUT =3.3V, f=1kHz | 5 | ||
| Power Supply Rejection Rate | PSRR | 65 | dB | IOUT =100mA, VOUT =3.3V, f=10kHz | 5 | ||
| Output Voltage Temperature Coefficient | ΔVOUT/ΔT*VOUT | -100 | 100 | ppm/°C | IOUT =30mA , TA=0~70°C | 5 | |
| Thermal Shutdown Temperature | TSHDN | 160 | °C | 5 | |||
| Thermal Shutdown Hysteresis | ΔTSHD | 20 | °C | 5 | |||
| Supply Input Voltage | VIN | -0.3 | 9 | V | 4 | ||
| EN to GND | VEN | -0.3 | 9 | V | 4 | ||
| Regulated Output Voltage | VOUT | -0.3 | 5 | V | 4 | ||
| Power Dissipation DFN1X1-4L | PD | 530 | mW | TA=+25℃ | 4 | ||
| Thermal Resistance Junction to air DFN1X1-4L | θJA | 235 | °C /W | JESD 51-7 | 4 | ||
| HBM ESD | -4000 | 4000 | V | Human Body Model (HBM) | 4 | ||
| CDM ESD | -2000 | 2000 | V | Charged Device Mode (CDM) | 4 | ||
| Machine Mode ESD | 200 | V | Machine Mode (MM) | 4 | |||
| Storage Temperature Range | TSTG | -65 | 150 | °C | 4 | ||
| Operating Junction Temperature | TJ | 150 | °C | 4 | |||
| Lead Temperature (Soldering 10s) | TLEAD | 260 | °C | 4 | |||
| Operating Ambient Temperature | -40 | 85 | °C | 4 | |||
| Input Voltage | 2 | 7 | V | 4 | |||
| Output Voltage | 0.8 | 5 | V | 4 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | copper | and output capacitors must be back to the WL9005 ground pin using as wide and as short of a copper trace as is practical.Connections using long trace lengths, narrow trace widths, and/or | 10 |
CAD (KiCad official)
- Symbol:
WL9005D4-09 - Footprint:
Package_DFN_QFN:UDFN-4-1EP_1x1mm_P0.65mm_EP0.48x0.48mm - 3D model: DFN1x1-4L (KiCad packages3D, STEP)
- 3D model files:
wl9005d4-09-etched.step/wl9005d4-09-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);wl9005d4-09.step/wl9005d4-09.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: WPMtek(Wei Pan Microelectronics) datasheet (11 pp, sha256
2ed7848826dfb0c6, retrieved 2026-10-30, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).