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Contents

Pinout
Key specifications
CAD (KiCad official)
Provenance

README

markdown

BQ24753ARHDR

Texas Instruments · Battery Management · VQFN-28(5x5)

BQ24753ARHDR from Texas Instruments, in a VQFN-28(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	CHGEN	input	Active-low charge enable logic input: low enables charging and high disables it, with input thresholds of 0.8 V (low) and 2.1 V (high).
2	ACN	input	Adapter current sense resistor negative input, with a 0.1-μF differential filter capacitor to ACP and an optional 0.1-μF common-mode capacitor to AGND; ACP-ACN is limited to ±0.3 V.
3	ACP	input	Adapter current sense resistor positive input, with a 0.1-μF differential filter capacitor to ACN and a 0.1-μF common-mode capacitor to AGND; the input common-mode range is 0 to 24 V.
4	ACDRV	output	Gate driver output for the AC adapter-to-system P-channel ACFET (and reverse-blocking FET), which latches off when ACOP exceeds 2 V.
5	ACDET	input	Adapter-detect threshold input set by a resistor divider to AGND; adapter is detected when ACDET exceeds 2.4 V rising (40 mV falling hysteresis), and the IADAPT amplifier is active above 0.6 V.
6	ACSET	input	Adapter current set input whose ratio to VDAC programs the input current regulation set-point during DPM, with an ACSET voltage range of 0 to VDAC.
7	ACOP	input	Input overpower time-constant input with a ceramic capacitor to AGND; the ACDRV latches off when ACOP exceeds 2 V, and the latch is reset by toggling ACDET or PVCC UVLO.
8	OVPSET	input	Input overvoltage protection threshold set input via a resistor divider to AGND; charge is disabled and ACDRV is turned off when OVPSET exceeds 3.1 V (non-latching).
9	AGND	power_in	Analog ground for low-current sensitive analog and digital signals, connected to PGND only through the thermal pad.
10	VREF	power_in	3.3-V regulated reference output requiring a 1-μF ceramic capacitor to AGND, with a 0 to 30 mA regulation range; do not apply an external voltage to this pin.
11	VDAC	input	Reference input for ratiometric programming, operating from 2.6 V to 3.6 V, to which VREF or an external DAC supply is connected.
12	VADJ	input	Charge voltage set input whose ratio to VDAC sets the battery regulation point, with a VADJ range of 0 to REGN; connecting VADJ to REGN gives the default of 4.2 V per cell.
13	ACGOOD	output	Active-low, open-drain adapter-present output that is pulled low when the input exceeds the programmed ACDET threshold, typically pulled up with 10 kΩ to VREF; the output low voltage is 0.5 V maximum at 5 mA sink.
14	BATDRV	output	Gate driver output for the battery-to-system P-channel BATFET, with its source at the system node and drain at the battery; the drive is 6.5 V typical relative to ACN.
15	IADAPT	output	Adapter current sense amplifier output at 20 V/V gain of the ACP-ACN differential voltage, with an output range of 0 to 2 V and a maximum load capacitance of 100 pF.
16	SRSET	input	Charge current set input whose ratio to VDAC programs the charge current regulation set-point, with an SRSET voltage range of 0 to VDAC.
17	BAT	power_in	Battery voltage remote sense input, connected by a Kelvin trace to the battery positive terminal with a 0.1-μF capacitor to AGND; the BAT regulation range is 8 to 18.048 V across 2 to 4 cells.
18	SRN	input	Charge current sense resistor negative input, with a 0.1-μF differential capacitor to SRP and an optional 0.1-μF common-mode capacitor to AGND; SRP-SRN is limited to ±0.3 V.
19	SRP	input	Charge current sense resistor positive input, with a 0.1-μF differential capacitor to SRN and a 0.1-μF common-mode capacitor to AGND; the charge current regulation differential range is 0 to 100 mV.
20	CELLS	input	Cell-count selection input: logic low programs 3 cells, logic high programs 4 cells, and floating programs 2 cells.
21	LEARN	input	Learn mode logic input with a 5.5 V maximum rating; when high with an adapter present, charging is disabled, ACDRV is off and BATDRV is on, and the system selector switches to the adapter if the battery falls below 3 V.
22	PGND	power_in	Power ground for the high-current converter node, connected directly to the low-side MOSFET source and the input and output capacitor grounds, and connected to AGND only through the thermal pad.
23	LODRV	output	PWM low-side gate driver output with a 6-V REGN-referenced drive, connected to the low-side power MOSFET gate by a short trace.
24	REGN	output	PWM low-side driver 6-V supply output requiring a 1-μF ceramic capacitor to PGND and a Schottky diode to BTST; REGN is disabled when CHGEN is high, with a regulated voltage of 5.6 to 6.2 V.
25	PH	power_in	PWM high-side driver negative supply connected to the phase switching node, with a 0.1-μF bootstrap capacitor from PH to BTST; the PH range is -1 to 24 V.
26	HIDRV	output	PWM high-side driver output connected to the high-side power MOSFET gate by a short trace, with BTST-PH limited to 30 V.
27	BTST	power_in	PWM high-side driver positive bootstrap supply, with a 0.1-μF bootstrap capacitor to PH and a Schottky diode from REGN; BTST and HIDRV are rated 36 V maximum to AGND and PGND.
28	PVCC	power_in	IC power supply input connected to the diode-OR common-source node of the ACFET and reverse-blocking FET, with an operating range of 8 to 24 V and a 0.1-μF capacitor to PGND.
29	EP	passive	Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	VQFN-28(5x5)
Category	Power Management (PMIC)
Pins	29

CAD (KiCad official)

Symbol: BQ24753ARHDR
Footprint: Package_DFN_QFN:QFN-28-1EP_5x5mm_P0.5mm_EP3.35x3.35mm
3D model: VQFN-28(5x5) (KiCad packages3D, STEP)
3D model files: bq24753arhdr-etched.step / bq24753arhdr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); bq24753arhdr.step / bq24753arhdr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (46 pp, sha256 064e1b55737c8832, retrieved 2026-10-10, tier: lcsc)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF