Loads when you scroll to it. Unloads after 5 minutes in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

PCB Footprint

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Loads when you scroll to it. Unloads after 5 minutes in the background.
Download PDF
Contents

README

markdown

TPS62151RGTR

Texas Instruments · DC-DC Converters · WQFN-16-EP(3x3)

TPS62151RGTR from Texas Instruments, in a WQFN-16-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 SW output Switch node connected to the internal MOSFET switches; connect the inductor between SW and the output capacitor.
2 SW output Switch node connected to the internal MOSFET switches; connect the inductor between SW and the output capacitor.
3 SW output Switch node connected to the internal MOSFET switches; connect the inductor between SW and the output capacitor.
4 PG output Open-drain output power good (high = VOUT ready, low = VOUT below nominal regulation), requires a pullup resistor; PG sink current is limited to 10 mA maximum.
5 FB input Voltage feedback input of the adjustable version; connect a resistive voltage divider to this pin, and connect FB to AGND on fixed-output versions for improved thermal performance.
6 AGND power_in Analog ground; must be connected directly to the exposed thermal pad and the common ground plane.
7 FSW input Switching frequency select: low selects approximately 2.5 MHz and high selects approximately 1.25 MHz for typical operation; an internal pulldown keeps the pin low if floating.
8 DEF input Output voltage scaling: low selects nominal output voltage and high selects nominal plus 5%; an internal pulldown keeps the pin low if floating.
9 SS/TR input Soft-start and tracking pin; an external capacitor on this pin sets the internal voltage reference rise time and can be used for tracking and sequencing.
10 AVIN power_in Supply voltage for the control circuitry, to be connected to the same source as PVIN; the input voltage range is 3 V to 17 V.
11 PVIN power_in Supply voltage for the power stage, to be connected to the same source as AVIN; the input voltage range is 3 V to 17 V.
12 PVIN power_in Supply voltage for the power stage, to be connected to the same source as AVIN; the input voltage range is 3 V to 17 V.
13 EN input Enable input (high = enabled, low = disabled); an internal pulldown keeps the pin low if floating.
14 VOS input Output voltage sense pin and connection for the control loop circuitry.
15 PGND power_in Power ground; must be connected directly to the exposed thermal pad and the common ground plane.
16 PGND power_in Power ground; must be connected directly to the exposed thermal pad and the common ground plane.
17 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package WQFN-16-EP(3x3)
Category Power Management (PMIC)
Pins 17

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input voltage range VIN 3 17 V 5
Operating quiescent current IQ 17 30 µA EN = High, IOUT = 0 mA, device not switching 5
Operating quiescent current IQ 17 25 µA TA = -40°C to +85°C 5
Shutdown current ISD 1.5 25 µA EN = Low 5
Shutdown current ISD 1.5 4 µA TA = -40°C to +85°C 5
Undervoltage lockout threshold VUVLO 2.6 2.7 2.8 V Falling input voltage (PWM mode operation) 5
Input leakage current (EN, DEF, FSW) ILKG 0.01 1 µA EN = VIN or GND; DEF, FSW = VOUT or GND 5
Power-good threshold voltage, rising VTH_PG 92 95 98 %VOUT Rising (%VOUT) 5
Power-good threshold voltage, falling VTH_PG 87 90 94 %VOUT Falling (%VOUT) 5
Power-good output low voltage VOL_PG 0.07 0.3 V IPG = -2 mA 5
Input leakage current (PG) ILKG_PG 1 400 nA VPG = 1.8 V 5
SS/TR pin source current ISS/TR 2.3 2.5 2.7 µA 5
High-side MOSFET ON-resistance rDS(on) 90 170 mΩ VIN ≥ 6 V 5
Low-side MOSFET ON-resistance rDS(on) 40 70 mΩ VIN ≥ 6 V 5
High-side MOSFET forward current limit ILIMF 1.4 1.7 2.2 A VIN = 12 V, TA = 25°C 5
Supply voltage VIN (at AVIN and PVIN) VIN 3 17 V 4
Operating junction temperature TJ -40 125 °C 4
Pin voltage AVIN, PVIN -0.3 20 V 4
Pin voltage EN, SS/TR -0.3 V max VIN + 0.3 V 4
Pin voltage SW -0.3 V max VIN + 0.3 V 4
Pin voltage DEF, FSW, FB, PG, VOS -0.3 7 V 4
Power-good sink current PG 10 mA 4
Operating junction temperature TJ -40 150 °C 4
Storage temperature Tstg -65 150 °C 4
Junction-to-ambient thermal resistance RθJA 45 °C/W 4
Junction-to-case (top) thermal resistance RθJC(top) 53.6 °C/W 4
Junction-to-board thermal resistance RθJB 17.4 °C/W 4
Junction-to-top characterization parameter ψJT 1.1 °C/W 4
Junction-to-board characterization parameter ψJB 17.4 °C/W 4
Junction-to-case (bottom) thermal resistance RθJC(bot) 4.5 °C/W 4

CAD (KiCad official)

  • Symbol: TPS62151RGTR
  • Footprint: Package_DFN_QFN:QFN-16-1EP_3x3mm_P0.5mm_EP1.7x1.7mm
  • 3D model: WQFN-16-EP(3x3) (KiCad packages3D, STEP)
  • 3D model files: tps62151rgtr-etched.step / tps62151rgtr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps62151rgtr.step / tps62151rgtr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (44 pp, sha256 b146908d5c550566, retrieved 2026-11-05, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF