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HC32L110C4UA-SFN20TR

Public Made by Adom

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XHSC Microcontrollers (MCU/MPU/SOC), WQFN-20-EP(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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3D Model

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Symbol & Footprint

Schematic Symbol

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PCB Footprint

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Datasheet

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Contents

README

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HC32L110C4UA-SFN20TR

XHSC · Microcontrollers (MCU/MPU/SOC) · WQFN-20-EP(3x3)

HC32L110C4UA-SFN20TR from XHSC, in a WQFN-20-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 RESETB/P00 input Active-low chip reset input with a non-disconnectable pull-up (80 kΩ typ.), VIL max 0.3VCC, VIH min 0.7VCC, 200 mV Schmitt hysteresis and 100 ns filtered pulse; also usable as GPIO P00 digital input.
2 XTHI/AIN7/VCIN7/P01 bidirectional GPIO P01 that doubles as the 4-32 MHz XTH crystal oscillator input, AIN7/VCIN7 analog input, and UART0_RXD, I2C_SDA and timer functions.
3 XTHO/AIN8/P02 bidirectional GPIO P02 that doubles as the 4-32 MHz XTH crystal oscillator output and AIN8 analog input, also UART0_TXD and I2C_SCL.
4 AVSS/DVSS power_in Chip ground; all VSS pins must be connected to the external supply system within its allowed range.
5 VCAP power_out LDO core supply output for internal circuits only; a 4.7uF capacitor must be connected to it.
6 AVCC/DVCC power_in Chip power supply, 1.8 V to 5.5 V; decoupling capacitors must be placed as close as possible to this pin.
7 LVDIN1/P03 bidirectional GPIO P03 that doubles as LVDIN1 analog monitoring input for the LVD, plus PCA, SPI_CS, Timer6, LPTimer, RTC_1HZ and VC0_OUT functions.
8 XTLO/P15 bidirectional GPIO P15 that doubles as the 32.768 kHz XTL crystal oscillator output, also I2C_SDA, UART0_RXD and LVD_OUT.
9 XTLI/P14 bidirectional GPIO P14 that doubles as the 32.768 kHz XTL crystal oscillator input, also I2C_SCL, PCA external clock input (ECI) and ADC_RDY.
10 LVDIN2/VCIN0/P23 bidirectional GPIO P23 that doubles as LVDIN2/VC0 analog input, also PCA_CH0, SPI_MISO, UART1_TXD and 38 kHz IR carrier output (IR_OUT).
11 P24/AIN0 bidirectional GPIO P24 that doubles as AIN0 analog input, also VC1_OUT, SPI_MOSI, UART1_RXD and HCLK_OUT.
12 P25/LVDIN3/VC1 bidirectional GPIO P25 that doubles as LVDIN3/VC1 analog input, also LVD_OUT, LPUART_RXD and I2C_SDA.
13 P26/AIN1 bidirectional GPIO P26 that doubles as AIN1 analog input, also SPI_MOSI, LPUART_TXD and I2C_SCL.
14 P27/SWDIO bidirectional GPIO P27 that doubles as the SWDIO serial-wire debug data pin; the datasheet lists P27/P31 as an alternative SWD/ISP programming interface.
15 P31/SWCLK bidirectional GPIO P31 that doubles as the SWCLK serial-wire debug clock pin, also usable for SWD/ISP programming alongside P27.
16 P32/AIN2/VCIN2 bidirectional GPIO P32 that doubles as AIN2/VC2 analog input, also RTC_1HZ, UART1_TXD and VC1OUT.
17 P33/AIN3/VCIN3 bidirectional GPIO P33 that doubles as AIN3/VC3 analog input, also UART1_RXD, LPUART_RXD and XTL_OUT (32K oscillator output).
18 AIN4/VCIN4/P34 bidirectional GPIO P34 that doubles as AIN4/VC4 analog input, also RTC_1HZ, LPUART_TXD and TIM0_EXT.
19 AIN5/VCIN5/P35 bidirectional GPIO P35 that doubles as AIN5/VC5 analog input; the datasheet recommends reserving P35 and P36 as the ISP programming interface, also UART1_TXD, UART0_TXD and I2C_SDA.
20 AIN6/VCIN6/AVREF/P36 bidirectional GPIO P36 that doubles as AIN6/VC6 analog input and AVREF external reference input, also UART1_RXD, UART0_RXD and I2C_SCL; the datasheet recommends reserving P35/P36 as the ISP programming interface.
21 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer XHSC
Package WQFN-20-EP(3x3)
Category Embedded Processors & Controllers
Pins 21

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
External main supply voltage VCC-VSS (including AVCC and DVCC) VCC, VSS -0.3 5.5 V External main supply voltage (including AVCC and DVCC) 28
Voltage difference between supply pins /ΔVCCx/ 50 mV 28
Voltage difference between ground pins /VSSx, VSS/ 50 mV 28
Total supply current through DVCC/AVCC supply line IVCC 300 mA Supply current through DVCC/AVCC lines 28
Total ground current through VSS line IVSS 300 mA Current flowing out through VSS ground line 28
Output sink current on any I/O and control pin IIO 25 mA 28
Output current on any I/O and control pin -25 mA 28
Injection current on RESETB pin IINJ(PIN) -5 5 mA RESETB pin 28
Injection current on XTHI pin of XTH and XTLI pin of XTL IINJ(PIN) -5 5 mA XTHI of XTH and XTLI of XTL 28
Injection current on other pins IINJ(PIN) -5 5 mA Other pins 28
Total injection current on all I/O and control pins ∑IINJ(PIN) -25 25 mA 28
Operating supply voltage (Vdd) VCC 1.8 5.5 V Ordering table entry for HC32L110C4UA (Vdd 1.8~5.5V) 67
Operating ambient temperature -40 85 ℃ Series feature list (HC32L110 series) 1
External input voltage range (LVD) Vex 0 V 32
Internal 2.5V reference voltage VREF25 2.475 2.5 2.525 V 常温25°C 3.3V 33
Internal 2.5V reference voltage VREF25 2.463 2.5 2.525 V -4085°C 2.85.5V 33
Internal 1.5V reference voltage VREF15 1.485 1.5 1.515 V 常温25°C 3.3V 33
Internal 1.5V reference voltage VREF15 1.477 1.5 1.519 V -4085°C 1.85.5V 33
IDD run mode, 4 MHz RCH IDD 700 880 μA All peripherals clock ON, VCAP=1.55V, VCC=1.8-5.5V, RCH clock source, 4M 33
IDD run mode, 8 MHz RCH IDD 1350 1600 μA All peripherals clock ON, VCAP=1.55V, VCC=1.8-5.5V, RCH clock source, 8M 33
IDD run mode, 16 MHz RCH IDD 2500 3000 μA All peripherals clock ON, VCAP=1.55V, VCC=1.8-5.5V, RCH clock source, 16M 33
IDD run mode, 24 MHz RCH IDD 3600 4300 μA All peripherals clock ON, VCAP=1.55V, VCC=1.8-5.5V, RCH clock source, 24M, run while(1) in Flash 34
IDD run while(1) in Flash, 4 MHz RCH IDD 550 750 μA All peripheral clock OFF, VCAP=1.55V, VCC=1.8-5.5V, RCH clock source, 4M 34
IDD run while(1) in Flash, 8 MHz RCH IDD 1050 1300 μA All peripheral clock OFF, VCAP=1.55V, VCC=1.8-5.5V, RCH clock source, 8M 34
IDD run while(1) in Flash, 16 MHz RCH IDD 1900 2400 μA All peripheral clock OFF, VCAP=1.55V, VCC=1.8-5.5V, RCH clock source, 16M 34
IDD run while(1) in Flash, 24 MHz RCH IDD 2700 3300 μA All peripheral clock OFF, VCAP=1.55V, VCC=1.8-5.5V, RCH clock source, 24M 34
IDD run while(1) in Flash, 32 MHz RCH (Flash wait = 1) IDD 2850 3000 μA All peripheral clock OFF, VCAP=1.55V, VCC=1.8-5.5V, RCH clock source, 32M (Flash Wait= 1) 34
IDD sleep mode, 4 MHz RCH, peripherals ON IDD 260 280 μA All peripheral clock ON, VCAP=1.55V, VCC=1.8-5.5V, RCH clock source, 4M 34
IDD sleep mode, 8 MHz RCH, peripherals ON IDD 500 520 μA All peripheral clock ON, VCAP=1.55V, VCC=1.8-5.5V, RCH clock source, 8M 34
IDD sleep mode, 16 MHz RCH, peripherals ON IDD 950 970 μA All peripheral clock ON, VCAP=1.55V, VCC=1.8-5.5V, RCH clock source, 16M 34
IDD sleep mode, 24 MHz RCH, peripherals ON IDD 1400 1420 μA All peripheral clock ON, VCAP=1.55V, VCC=1.8-5.5V, RCH clock source, 24M 34
IDD sleep mode, 4 MHz RCH, peripherals OFF IDD 110 125 μA All peripheral clock OFF, VCAP=1.55V, VCC=1.8-5.5V, RCH clock source, 4M 34
IDD sleep mode, 8 MHz RCH, peripherals OFF IDD 190 210 μA All peripheral clock OFF, VCAP=1.55V, VCC=1.8-5.5V, RCH clock source, 8M 34
IDD sleep mode, 16 MHz RCH, peripherals OFF IDD 330 360 μA All peripheral clock OFF, VCAP=1.55V, VCC=1.8-5.5V, RCH clock source, 16M 34
IDD sleep mode, 24 MHz RCH, peripherals OFF IDD 470 500 μA All peripheral clock OFF, VCAP=1.55V, VCC=1.8-5.5V, RCH clock source, 24M 34
IDD sleep mode, 32 MHz RCH, peripherals OFF IDD 580 610 μA All peripheral clock OFF, VCAP=1.55V, VCC=1.8-5.5V, RCH clock source, 32M 34
IDD LP run, peripherals ON, TA -40 to 25°C IDD 7 9 μA All peripherals clock ON, run while(1) in Flash, VCAP=1.55V, VCC=1.8-5.5V, XTL 32.768kHz (Driver = 1), TA = −40 to 25°C 34
IDD LP run, peripherals ON, TA 50°C IDD 7.3 9.2 μA All peripherals clock ON, run while(1) in Flash, VCAP=1.55V, VCC=1.8-5.5V, XTL 32.768kHz (Driver = 1), TA = 50 °C 34
IDD LP run, peripherals ON, TA 85°C IDD 8.9 11.3 μA All peripherals clock ON, run while(1) in Flash, VCAP=1.55V, VCC=1.8-5.5V, XTL 32.768kHz (Driver = 1), TA = 85 °C 34
IDD LP run, peripherals OFF, TA -40 to 25°C IDD 6 8 μA All peripherals clock OFF, run while(1) in Flash, VCAP=1.55V, VCC=1.8-5.5V, XTL 32.768kHz (Driver = 1), TA = −40 to 25°C 34
IDD LP run, peripherals OFF, TA 50°C IDD 6.1 8.2 μA All peripherals clock OFF, run while(1) in Flash, VCAP=1.55V, VCC=1.8-5.5V, XTL 32.768kHz (Driver = 1), TA = 50 °C 34
IDD LP run, peripherals OFF, TA 85°C IDD 7.7 10.1 μA All peripherals clock OFF, run while(1) in Flash, VCAP=1.55V, VCC=1.8-5.5V, XTL 32.768kHz (Driver = 1), TA = 85 °C 34
IDD LP sleep, peripherals ON, TA -40 to 25°C IDD 3.3 3.5 μA All peripherals clock ON, VCAP=1.55V, VCC=1.8-5.5V, XTL 32.768kHz (Driver = 1), TA = −40 to 25°C 34
IDD LP sleep, peripherals ON, TA 50°C IDD 3.6 3.8 μA All peripherals clock ON, VCAP=1.55V, VCC=1.8-5.5V, XTL 32.768kHz (Driver = 1), TA = 50 °C 34
IDD LP sleep, peripherals ON, TA 85°C IDD 5.4 5.8 μA All peripherals clock ON, VCAP=1.55V, VCC=1.8-5.5V, XTL 32.768kHz (Driver = 1), TA = 85 °C 34
IDD LP sleep, all peripherals OFF except LPTimer and RTC, TA -40 to 25°C IDD 2.2 2.4 μA All peripherals clock OFF except LPTimer and RTC, VCAP=1.55V, VCC=1.8-5.5V, XTL 32.768kHz (Driver = 1), TA = −40 to 25°C 34
IDD LP sleep, all peripherals OFF except LPTimer and RTC, TA 50°C IDD 2.5 2.6 μA All peripherals clock OFF except LPTimer and RTC, VCAP=1.55V, VCC=1.8-5.5V, XTL 32.768kHz (Driver = 1), TA = 50 °C 34
IDD LP sleep, all peripherals OFF except LPTimer and RTC, TA 85°C IDD 4.2 4.6 μA All peripherals clock OFF except LPTimer and RTC, VCAP=1.55V, VCC=1.8-5.5V, XTL 32.768kHz (Driver = 1), TA = 85 °C 34
IDD DeepSleep, TA -40 to 25°C IDD 1.5 1.65 μA All peripherals clock OFF except RTC, WDT, VCAP=1.55V, VCC=1.8-5.5V, TA = −40 to 25°C 34
IDD DeepSleep, TA 50°C IDD 1.85 2.2 μA All peripherals clock OFF except RTC, WDT, VCAP=1.55V, VCC=1.8-5.5V, TA = 50 °C 34
IDD DeepSleep, TA 85°C IDD 3.5 4.2 μA All peripherals clock OFF except RTC, WDT, VCAP=1.55V, VCC=1.8-5.5V, TA = 85 °C 34

CAD (KiCad official)

  • Symbol: HC32L110C4UA-SFN20TR
  • Footprint: Package_DFN_QFN:UQFN-20-1EP_3x3mm_P0.4mm_EP1.85x1.85mm
  • 3D model: WQFN-20-EP(3x3) (KiCad packages3D, STEP)
  • 3D model files: hc32l110c4ua-sfn20tr-etched.step / hc32l110c4ua-sfn20tr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); hc32l110c4ua-sfn20tr.step / hc32l110c4ua-sfn20tr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: XHSC datasheet (69 pp, sha256 9ca08dbf01e4bbb9, retrieved 2026-10-19, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF