component
NVMS5P02R2G
Public Made by Adomby adom
onsemi MOSFETs, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownNVMS5P02R2G
onsemi · MOSFETs · SOIC-8
NVMS5P02R2G from onsemi, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | NC | unconnected | No connection (N.C.) per case 751 Style 13 pin assignment. |
| 2 | S | passive | Source of the single P-channel MOSFET (VDSS −20 V, ID max −5.4 A), tied with pins 3. |
| 3 | S | passive | Source of the single P-channel MOSFET (VDSS −20 V, ID max −5.4 A), tied with pin 2. |
| 4 | G | input | Gate of the P-channel MOSFET with VGS rated ±10 V continuous and a threshold of −0.65 to −1.25 V. |
| 5 | D | passive | Drain of the P-channel MOSFET, VDSS −20 V, tied with pins 6, 7 and 8. |
| 6 | D | passive | Drain of the P-channel MOSFET, VDSS −20 V, tied with pins 5, 7 and 8. |
| 7 | D | passive | Drain of the P-channel MOSFET, VDSS −20 V, tied with pins 5, 6 and 8. |
| 8 | D | passive | Drain of the P-channel MOSFET, VDSS −20 V, tied with pins 5, 6 and 7. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | SOIC-8 |
| Category | Triode/MOS Tube/Transistor |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-to-Source Voltage | VDSS | -20 | V | TJ = 25°C | 2 | ||
| Drain-to-Gate Voltage | VDGR | -20 | V | RGS = 1.0 MΩ | 2 | ||
| Gate-to-Source Voltage - Continuous | VGS | -10 | 10 | V | ±10 V | 2 | |
| Operating and Storage Temperature Range | TJ, Tstg | -55 | 150 | °C | 2 | ||
| Single Pulse Avalanche Energy | EAS | 360 | mJ | Starting TJ = 25°C, VDD = -20 Vdc, VGS = -5.0 Vdc, Peak IL = -8.5 Apk, L = 10 mH, RG = 25 Ω | 2 | ||
| Maximum Lead Temperature for Soldering | TL | 260 | °C | 1/8″ from case for 10 seconds | 2 | ||
| Total Power Dissipation (Note 1) | PD | 2.5 | W | TA = 25°C, 2″ sq FR-4, t ≤ 10 s | 2 | ||
| Total Power Dissipation (Note 2) | PD | 1.47 | W | TA = 25°C, 2″ sq FR-4, steady state | 2 | ||
| Total Power Dissipation (Note 3) | PD | 0.79 | W | TA = 25°C, minimum FR-4, steady state | 2 | ||
| Continuous Drain Current @ 25°C (Note 1) | ID | -7.05 | A | TA = 25°C, t ≤ 10 s | 2 | ||
| Continuous Drain Current @ 70°C (Note 1) | ID | -5.62 | A | TA = 70°C, t ≤ 10 s | 2 | ||
| Continuous Drain Current @ 25°C (Note 2) | ID | -5.4 | A | TA = 25°C, steady state | 2 | ||
| Continuous Drain Current @ 70°C (Note 2) | ID | -4.3 | A | TA = 70°C, steady state | 2 | ||
| Continuous Drain Current @ 25°C (Note 3) | ID | -3.95 | A | TA = 25°C, minimum FR-4, steady state | 2 | ||
| Continuous Drain Current @ 70°C (Note 3) | ID | -3.15 | A | TA = 70°C, minimum FR-4, steady state | 2 | ||
| Maximum Operating Power Dissipation (Note 1) | PD | 1.2 | W | 2″ sq FR-4, t ≤ 10 s | 2 | ||
| Maximum Operating Power Dissipation (Note 2) | PD | 0.7 | W | 2″ sq FR-4, steady state | 2 | ||
| Maximum Operating Power Dissipation (Note 3) | PD | 0.38 | W | Minimum FR-4, steady state | 2 | ||
| Maximum Operating Drain Current (Note 1) | ID | -4.85 | A | 2″ sq FR-4, t ≤ 10 s | 2 | ||
| Maximum Operating Drain Current (Note 2) | ID | -3.72 | A | 2″ sq FR-4, steady state | 2 | ||
| Maximum Operating Drain Current (Note 3) | ID | -2.75 | A | Minimum FR-4, steady state | 2 | ||
| Pulsed Drain Current (Note 1) | IDM | -28 | A | Pulse width = 300 µs, duty cycle = 2% | 2 | ||
| Pulsed Drain Current (Note 2) | IDM | -20 | A | Pulse width = 300 µs, duty cycle = 2% | 2 | ||
| Pulsed Drain Current (Note 3) | IDM | -12 | A | Pulse width = 300 µs, duty cycle = 2% | 2 | ||
| Thermal Resistance Junction-to-Ambient (Note 1) | RθJA | 50 | °C/W | 2″ sq FR-4, t ≤ 10 s | 2 | ||
| Thermal Resistance Junction-to-Ambient (Note 2) | RθJA | 85 | °C/W | 2″ sq FR-4, steady state | 2 | ||
| Thermal Resistance Junction-to-Ambient (Note 3) | RθJA | 159 | °C/W | Minimum FR-4, steady state | 2 | ||
| Drain-to-Source Breakdown Voltage | V(BR)DSS | -20 | Vdc | VGS = 0 Vdc, ID = -250 µAdc | 3 | ||
| Breakdown Voltage Temperature Coefficient (Positive) | V(BR)DSS | -15 | mV/°C | 3 | |||
| Zero Gate Voltage Drain Current | IDSS | -1 | µAdc | VDS = -16 Vdc, VGS = 0 Vdc, TJ = 25°C | 3 | ||
| Zero Gate Voltage Drain Current | IDSS | -10 | µAdc | VDS = -16 Vdc, VGS = 0 Vdc, TJ = 125°C | 3 | ||
| Gate-Body Leakage Current | IGSS | -100 | nAdc | VGS = -10 Vdc, VDS = 0 Vdc | 3 | ||
| Gate-Body Leakage Current | IGSS | 100 | nAdc | VGS = +10 Vdc, VDS = 0 Vdc | 3 | ||
| Gate Threshold Voltage | VGS(th) | -0.65 | -0.9 | -1.25 | Vdc | VDS = VGS, ID = -250 µAdc | 3 |
| Gate Threshold Temperature Coefficient (Negative) | VGS(th) | 2.9 | mV/°C | 3 | |||
| Static Drain-to-Source On-State Resistance | RDS(on) | 0.026 | 0.033 | Ω | VGS = -4.5 Vdc, ID = -5.4 Adc | 3 | |
| Static Drain-to-Source On-State Resistance | RDS(on) | 0.037 | 0.048 | Ω | VGS = -2.5 Vdc, ID = -2.7 Adc | 3 | |
| Forward Transconductance | gFS | 15 | Mhos | VDS = -9.0 Vdc, ID = -5.4 Adc | 3 | ||
| Input Capacitance | Ciss | 1375 | 1900 | pF | VDS = -16 Vdc, VGS = 0 Vdc, f = 1.0 MHz | 3 | |
| Output Capacitance | Coss | 510 | 900 | pF | VDS = -16 Vdc, VGS = 0 Vdc, f = 1.0 MHz | 3 | |
| Reverse Transfer Capacitance | Crss | 200 | 380 | pF | VDS = -16 Vdc, VGS = 0 Vdc, f = 1.0 MHz | 3 | |
| Turn-On Delay Time | td(on) | 18 | 35 | ns | VDD = -16 Vdc, ID = -1.0 Adc, VGS = -4.5 Vdc, RG = 6.0 Ω | 3 | |
| Rise Time | tr | 25 | 50 | ns | VDD = -16 Vdc, ID = -1.0 Adc, VGS = -4.5 Vdc, RG = 6.0 Ω | 3 | |
| Turn-Off Delay Time | td(off) | 70 | 125 | ns | VDD = -16 Vdc, ID = -1.0 Adc, VGS = -4.5 Vdc, RG = 6.0 Ω | 3 | |
| Fall Time | tf | 55 | 100 | ns | VDD = -16 Vdc, ID = -1.0 Adc, VGS = -4.5 Vdc, RG = 6.0 Ω | 3 | |
| Total Gate Charge | Qtot | 20 | 35 | nC | VDS = -16 Vdc, VGS = -4.5 Vdc, ID = -5.4 Adc | 3 | |
| Diode Forward On-Voltage | VSD | -0.95 | -1.25 | Vdc | IS = -5.4 Adc, VGS = 0 V | 3 | |
| Reverse Recovery Time | trr | 40 | 75 | ns | IS = -5.4 Adc, VGS = 0 Vdc, dIS/dt = 100 A/µs | 3 | |
| Turn-On Delay Time | td(on) | 22 | ns | VDD = -16 Vdc, ID = -5.4 Adc, VGS = -4.5 Vdc, RG = 6.0 Ω | 3 | ||
| Rise Time | tr | 70 | ns | VDD = -16 Vdc, ID = -5.4 Adc, VGS = -4.5 Vdc, RG = 6.0 Ω | 3 | ||
| Turn-Off Delay Time | td(off) | 65 | ns | VDD = -16 Vdc, ID = -5.4 Adc, VGS = -4.5 Vdc, RG = 6.0 Ω | 3 | ||
| Fall Time | tf | 90 | ns | VDD = -16 Vdc, ID = -5.4 Adc, VGS = -4.5 Vdc, RG = 6.0 Ω | 3 | ||
| Gate-Source Charge | Qgs | 4 | nC | VDS = -16 Vdc, VGS = -4.5 Vdc, ID = -5.4 Adc | 3 | ||
| Gate-Drain Charge | Qgd | 7 | nC | VDS = -16 Vdc, VGS = -4.5 Vdc, ID = -5.4 Adc | 3 | ||
| Diode Forward On-Voltage | VSD | -0.72 | Vdc | IS = -5.4 Adc, VGS = 0 Vdc, TJ = 125°C | 3 | ||
| Reverse Recovery Stored Charge | QRR | 0.03 | µC | IS = -5.4 Adc, VGS = 0 Vdc, dIS/dt = 100 A/µs | 3 |
CAD (KiCad official)
- Symbol:
NVMS5P02R2G - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
nvms5p02r2g-etched.step/nvms5p02r2g-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);nvms5p02r2g.step/nvms5p02r2g.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: onsemi datasheet (9 pp, sha256
bb8cbeddec297845, retrieved 2026-10-27, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).