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MC74VHCT50ADTR2G

Public Made by Adom

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onsemi Buffers, Drivers, Receivers, Transceivers, TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Contents

README

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MC74VHCT50ADTR2G

onsemi · Buffers, Drivers, Receivers, Transceivers · TSSOP-14

MC74VHCT50ADTR2G from onsemi, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 A1 input Buffer input A1 is TTL-compatible (VIL max 0.8 V, VIH min 2.0 V) and tolerates applied voltages up to 7 V regardless of the supply voltage.
2 Y1 output Buffer output Y1 swings the full 5 V CMOS level and its output structure is protected when VCC = 0 V.
3 A2 input Buffer input A2 is TTL-compatible (VIL max 0.8 V, VIH min 2.0 V) and tolerates applied voltages up to 7 V regardless of the supply voltage.
4 Y2 output Buffer output Y2 swings the full 5 V CMOS level and its output structure is protected when VCC = 0 V.
5 A3 input Buffer input A3 is TTL-compatible (VIL max 0.8 V, VIH min 2.0 V) and tolerates applied voltages up to 7 V regardless of the supply voltage.
6 Y3 output Buffer output Y3 swings the full 5 V CMOS level and its output structure is protected when VCC = 0 V.
7 GND power_in Ground reference for the device.
8 Y4 output Buffer output Y4 swings the full 5 V CMOS level and its output structure is protected when VCC = 0 V.
9 A4 input Buffer input A4 is TTL-compatible (VIL max 0.8 V, VIH min 2.0 V) and tolerates applied voltages up to 7 V regardless of the supply voltage.
10 Y5 output Buffer output Y5 swings the full 5 V CMOS level and its output structure is protected when VCC = 0 V.
11 A5 input Buffer input A5 is TTL-compatible (VIL max 0.8 V, VIH min 2.0 V) and tolerates applied voltages up to 7 V regardless of the supply voltage.
12 Y6 output Buffer output Y6 swings the full 5 V CMOS level and its output structure is protected when VCC = 0 V.
13 A6 input Buffer input A6 is TTL-compatible (VIL max 0.8 V, VIH min 2.0 V) and tolerates applied voltages up to 7 V regardless of the supply voltage.
14 VCC power_in Positive supply; the recommended DC supply range is 2.0 V to 5.5 V.

Key specifications

Parameter Value
Manufacturer onsemi
Package TSSOP-14
Category Logic
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
DC Supply Voltage VCC -0.5 7 V 2
DC Input Voltage VIN -0.5 7 V 2
DC Output Voltage VOUT -0.5 7 V Output in HIGH or LOW State 2
DC Input Diode Current IIK 20 mA 2
DC Output Diode Current IOK 20 mA 2
DC Output Source/Sink Current IO 25 mA 2
DC Supply Current per Supply Pin ICC 50 mA 2
DC Ground Current per Ground Pin IGND 50 mA 2
Storage Temperature Range TSTG -65 150 C 2
Lead Temperature TL 260 C 1 mm from case for 10 seconds 2
Junction Temperature under Bias TJ 150 C 2
Power Dissipation in Still Air PD 450 mW TSSOP, still air 2
ESD Withstand Voltage Human Body Model VESD 2000 V Human Body Model (printed > 2000) 2
ESD Withstand Voltage Machine Model VESD 200 V Machine Model (printed > 200) 2
ESD Withstand Voltage Charged Device Model VESD 2000 V Charged Device Model 2
Latch-Up Performance ILatch-Up 300 mA Above VCC and below GND at 85C 2
DC Supply Voltage VCC 2 5.5 V 2
DC Input Voltage VIN 0 5.5 V 2
DC Output Voltage VOUT 0 5.5 V VCC = 0, High or Low State 2
DC Output Voltage VOUT 0 V 2
Operating Temperature Range TA -55 125 C 2
Input Rise and Fall Time tr, tf 0 100 ns/V VCC = 3.3 V ± 0.3 V 2
Input Rise and Fall Time tr, tf 0 20 ns/V VCC = 5.0 V ± 0.5 V 2
Thermal Resistance, junction-to-ambient JA 170 C/W TSSOP; minimum pad spacing on FR4 (Note 1) 2
Quiet Output Maximum Dynamic VOL VOLP 0.8 1 V Input tr = tf = 3.0 ns, CL = 50 pF, VCC = 5.0 V, TA = 25C 3
Quiet Output Minimum Dynamic VOL VOLV -1 -0.8 V Input tr = tf = 3.0 ns, CL = 50 pF, VCC = 5.0 V, TA = 25C 3
Minimum High Level Dynamic Input Voltage VIHD 2 V Input tr = tf = 3.0 ns, CL = 50 pF, VCC = 5.0 V, TA = 25C 3
Maximum Low Level Dynamic Input Voltage VILD 0.8 V Input tr = tf = 3.0 ns, CL = 50 pF, VCC = 5.0 V, TA = 25C 3
Maximum Input Capacitance CIN 5 10 pF 3
Minimum High-Level Input Voltage VIH 1.2 V VCC = 3.0 V; TA = 25C 3
Minimum High-Level Input Voltage VIH 2 V VCC = 4.5 V; TA = 25C 3
Maximum Low-Level Input Voltage VIL 0.53 V VCC = 3.0 V; TA = 25C 3
Maximum Low-Level Input Voltage VIL 0.8 V VCC = 4.5 V; TA = 25C 3
Minimum High-Level Output Voltage VOH 2.9 V VIN = VIH or VIL; IOH = -50 uA; VCC = 3.0 V; TA = 25C 3
Minimum High-Level Output Voltage VOH 4.4 V VIN = VIH or VIL; IOH = -50 uA; VCC = 4.5 V; TA = 25C 3
Minimum High-Level Output Voltage VOH 2.58 V VIN = VIH or VIL; IOH = -4 mA; VCC = 3.0 V; TA = 25C 3
Minimum High-Level Output Voltage VOH 2.48 V VIN = VIH or VIL; IOH = -4 mA; VCC = 3.0 V; TA ≤ 85C 3
Minimum High-Level Output Voltage VOH 2.34 V VIN = VIH or VIL; IOH = -4 mA; VCC = 3.0 V; TA ≤ 125C 3
Minimum High-Level Output Voltage VOH 3.94 V VIN = VIH or VIL; IOH = -8 mA; VCC = 4.5 V; TA = 25C 3
Minimum High-Level Output Voltage VOH 3.8 V VIN = VIH or VIL; IOH = -8 mA; VCC = 4.5 V; TA ≤ 85C 3
Minimum High-Level Output Voltage VOH 3.66 V VIN = VIH or VIL; IOH = -8 mA; VCC = 4.5 V; TA ≤ 125C 3
Maximum Low-Level Output Voltage VOL 0 0.1 V VIN = VIH or VIL; IOL = 50 uA; VCC = 3.0 V; TA = 25C 3
Maximum Low-Level Output Voltage VOL 0.36 V VIN = VIH or VIL; IOH = -4 mA (as printed); VCC = 3.0 V; TA = 25C 3
Maximum Low-Level Output Voltage VOL 0.44 V VIN = VIH or VIL; IOH = -4 mA (as printed); VCC = 3.0 V; TA ≤ 85C 3
Maximum Low-Level Output Voltage VOL 0.52 V VIN = VIH or VIL; IOH = -4 mA (as printed); VCC = 3.0 V; TA ≤ 125C 3
Maximum Input Leakage Current IIN -0.1 0.1 uA VIN = 5.5 V or GND; VCC 0 to 5.5 V; TA = 25C 3
Maximum Input Leakage Current IIN -1 1 uA VIN = 5.5 V or GND; VCC 0 to 5.5 V; TA ≤ 85C 3
Maximum Quiescent Supply Current ICC 2 uA VIN = VCC or GND; VCC = 5.5 V; TA = 25C 3
Maximum Quiescent Supply Current ICC 20 uA VIN = VCC or GND; VCC = 5.5 V; TA ≤ 85C 3
Maximum Quiescent Supply Current ICC 40 uA VIN = VCC or GND; VCC = 5.5 V; TA ≤ 125C 3
Quiescent Supply Current ICCT 1.35 1.5 mA Input VIN = 3.4 V; VCC = 5.5 V; TA ≤ 85C 3
Quiescent Supply Current ICCT 1.65 mA Input VIN = 3.4 V; VCC = 5.5 V; TA ≤ 125C 3
Output Leakage Current IOFF 0.5 uA VOUT = 5.5 V; VCC = 0.0 V; TA = 25C 3

CAD (KiCad official)

  • Symbol: MC74VHCT50ADTR2G
  • Footprint: Package_SO:TSSOP-14_4.4x5mm_P0.65mm
  • 3D model: TSSOP-14 (KiCad packages3D, STEP)
  • 3D model files: mc74vhct50adtr2g-etched.step / mc74vhct50adtr2g-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mc74vhct50adtr2g.step / mc74vhct50adtr2g.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (6 pp, sha256 4240c31734cadc97, retrieved 2026-10-18, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF