Loads when you scroll to it. Unloads after 5 minutes in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

PCB Footprint

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Loads when you scroll to it. Unloads after 5 minutes in the background.
Download PDF
Contents

README

markdown

CD4049BD

Sungine · Buffers, Drivers, Receivers, Transceivers · DIP-16

CD4049BD from Sungine, in a DIP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VDD power_in Positive supply, recommended 3 to 15 V (absolute maximum -0.5 to +18 V).
2 G output Inverting buffer output G, the complement of input A; continuous output current max 12 mA.
3 A input Buffer input A, recommended 0 to 15 V and may exceed VDD (absolute maximum -0.5 to +18 V).
4 H output Inverting buffer output H, the complement of input B; continuous output current max 12 mA.
5 B input Buffer input B, recommended 0 to 15 V and may exceed VDD (absolute maximum -0.5 to +18 V).
6 I output Inverting buffer output I, the complement of input C; continuous output current max 12 mA.
7 C input Buffer input C, recommended 0 to 15 V and may exceed VDD (absolute maximum -0.5 to +18 V).
8 VSS power_in Ground supply, VSS = 0 V reference.
9 D input Buffer input D, recommended 0 to 15 V and may exceed VDD (absolute maximum -0.5 to +18 V).
10 J output Inverting buffer output J, the complement of input D; continuous output current max 12 mA.
11 E input Buffer input E, recommended 0 to 15 V and may exceed VDD (absolute maximum -0.5 to +18 V).
12 K output Inverting buffer output K, the complement of input E; continuous output current max 12 mA.
13 NC unconnected No internal connection.
14 F input Buffer input F, recommended 0 to 15 V and may exceed VDD (absolute maximum -0.5 to +18 V).
15 L output Inverting buffer output L, the complement of input F; continuous output current max 12 mA.
16 NC unconnected No internal connection.

Key specifications

Parameter Value
Manufacturer Sungine
Package DIP-16
Category Logic
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VDD -0.5 18 V 5
Input voltage VIN -0.5 18 V 5
Output pin voltage VOUT -0.5 V -0.5 ~ VDD+0.5 V 5
Storage temperature tS -65 150 ℃ 5
Power dissipation DIP PD 700 mW DIP 5
Soldering temperature tL 260 ℃ 10 s 5
Supply voltage VDD 3 15 V 6
Input voltage VIN 0 15 V 6
Output voltage VOUT 0 V 0~VDD 6
Operating temperature TA -10 70 ℃ CD4049B 6
Quiescent current 25°C IDD 0.03 4 µA VDD=5V, 25℃ 7
Quiescent current 25°C IDD 0.05 8 µA VDD=10V, 25℃ 7
Quiescent current 25°C IDD 0.07 16 µA VDD=15V, 25℃ 7
Quiescent current -40°C IDD 4 µA VDD=5V, -40℃ 7
Quiescent current -40°C IDD 8 µA VDD=10V, -40℃ 7
Quiescent current -40°C IDD 16 µA VDD=15V, -40℃ 7
Quiescent current 85°C IDD 30 µA VDD=5V, 85℃ 7
Quiescent current 85°C IDD 60 µA VDD=10V, 85℃ 7
Quiescent current 85°C IDD 120 µA VDD=15V, 85℃ 7
Low-level output voltage VOL 0 0.05 V VIH=VDD, VIL=0V, /IO/<1µA, VDD=5V, 25℃ 7
High-level output voltage VOH 4.95 5 V VIH=VDD, VIL=0V, /IO/<1µA, VDD=5V, 25℃ 7
High-level output voltage VOH 9.95 10 V VIH=VDD, VIL=0V, /IO/<1µA, VDD=10V, 25℃ 7
High-level output voltage VOH 14.95 15 V VIH=VDD, VIL=0V, /IO/<1µA, VDD=15V, 25℃ 7
Low-level input voltage (CD4049) VIL 1.5 1 V /IO/<1µA, VDD=5V, VO=4.5V, 25℃ 7
Low-level input voltage (CD4049) VIL 2.5 2 V /IO/<1µA, VDD=10V, VO=9V, 25℃ 7
Low-level input voltage (CD4049) VIL 3.5 3 V /IO/<1µA, VDD=15V, VO=13.5V, 25℃ 7
High-level input voltage (CD4049) VIH 4 3.5 V /IO/<1µA, VDD=5V, VO=0.5V, 25℃ 7
High-level input voltage (CD4049) VIH 8 7.5 V /IO/<1µA, VDD=10V, VO=1.0V, 25℃ 7
High-level input voltage (CD4049) VIH 12 11.5 V /IO/<1µA, VDD=15V, VO=1.5V, 25℃ 7
Low-level output current IOL 0.51 1 mA VDD=5V, VO=0.4V, 25℃ 7
Low-level output current IOL 1.3 2.8 mA VDD=10V, VO=0.5V, 25℃ 7
Low-level output current IOL 3.4 6.8 mA VDD=15V, VO=1.5V, 25℃ 7
High-level output current IOH -0.51 -1 mA VDD=5V, VO=4.6V, 25℃ 7
High-level output current IOH -1.3 -2.6 mA VDD=10V, VO=9.5V, 25℃ 7
High-level output current IOH -3.4 -6.8 mA VDD=15V, VO=13.5V, 25℃ 8
Input current IIN -0.3 µA VDD=15V, VIN=0V 8
Input current IIN 0.3 µA VDD=15V, VIN=15V 8
Propagation delay high to low tPHL 30 65 nS VDD=5V, TA=25℃, RL=200KΩ, CL=50pF, tr=tf=20ns 9
Propagation delay high to low tPHL 20 40 nS VDD=10V, TA=25℃, RL=200KΩ, CL=50pF, tr=tf=20ns 9
Propagation delay high to low tPHL 15 30 nS VDD=15V, TA=25℃, RL=200KΩ, CL=50pF, tr=tf=20ns 9
Propagation delay low to high tPLH 45 85 nS VDD=5V, TA=25℃, RL=200KΩ, CL=50pF, tr=tf=20ns 9
Propagation delay low to high tPLH 25 45 nS VDD=10V, TA=25℃, RL=200KΩ, CL=50pF, tr=tf=20ns 9
Propagation delay low to high tPLH 20 35 nS VDD=15V, TA=25℃, RL=200KΩ, CL=50pF, tr=tf=20ns 9
Transition time high to low tTHL 30 60 nS VDD=5V, TA=25℃, RL=200KΩ, CL=50pF, tr=tf=20ns 9
Transition time high to low tTHL 20 40 nS VDD=10V, TA=25℃, RL=200KΩ, CL=50pF, tr=tf=20ns 9
Transition time high to low tTHL 15 30 nS VDD=15V, TA=25℃, RL=200KΩ, CL=50pF, tr=tf=20ns 9
Input capacitance CIN 15 22.5 pF any input 9

CAD (KiCad official)

  • Symbol: CD4049BD
  • Footprint: Package_DIP:DIP-16_W7.62mm
  • 3D model: DIP-16 (KiCad packages3D, STEP)
  • 3D model files: cd4049bd-etched.step / cd4049bd-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cd4049bd.step / cd4049bd.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Sungine datasheet (11 pp, sha256 e86811a7877670e2, retrieved 2026-10-26, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF