component
DMG4496SSS-13
Public Made by Adomby adom
Diodes Incorporated MOSFETs, SO-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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Contents
README
markdownDMG4496SSS-13
Diodes Incorporated · MOSFETs · SO-8
DMG4496SSS-13 from Diodes Incorporated, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S | passive | Source terminal of the N-channel MOSFET, tied to the other source pins (2, 3) in the internal schematic. |
| 2 | S | passive | Source terminal of the N-channel MOSFET, tied to the other source pins (1, 3) in the internal schematic. |
| 3 | S | passive | Source terminal of the N-channel MOSFET, tied to the other source pins (1, 2) in the internal schematic. |
| 4 | G | input | Gate terminal; VGS rated ±25 V maximum with threshold of 0.8 to 2.0 V. |
| 5 | D | passive | Drain terminal, connected to pins 6, 7 and 8; VDSS 30 V, continuous ID 10 A at TA = +25°C. |
| 6 | D | passive | Drain terminal, connected to pins 5, 7 and 8; VDSS 30 V, continuous ID 10 A at TA = +25°C. |
| 7 | D | passive | Drain terminal, connected to pins 5, 6 and 8; VDSS 30 V, continuous ID 10 A at TA = +25°C. |
| 8 | D | passive | Drain terminal, connected to pins 5, 6 and 7; VDSS 30 V, continuous ID 10 A at TA = +25°C. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | SO-8 |
| Category | Transistors/Thyristors |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Breakdown Voltage | BVDSS | 30 | V | VGS = 0V, ID = 250μA | 2 | ||
| Zero Gate Voltage Drain Current | IDSS | 1 | μA | VDS = 30V, VGS = 0V | 2 | ||
| Gate-Source Leakage | IGSS | -100 | 100 | nA | VGS = ±25V, VDS = 0V | 2 | |
| Gate Threshold Voltage | VGS(th) | 0.8 | 1.2 | 2 | V | VDS = VGS, ID = 250μA | 2 |
| Static Drain-Source On-Resistance | RDS(ON) | 16 | 21.5 | mΩ | VGS = 10V, ID = 10A | 2 | |
| Static Drain-Source On-Resistance | RDS(ON) | 22 | 29 | mΩ | VGS = 4.5V, ID = 7.5A | 2 | |
| Diode Forward Voltage | VSD | 0.7 | 1 | V | VGS = 0V, IS = 1A | 2 | |
| Drain-Source Voltage | VDSS | 30 | V | 2 | |||
| Gate-Source Voltage | VGSS | -25 | 25 | V | 2 | ||
| Continuous Drain Current (steady state) | ID | 10 | A | TA = +25°C (Note 6) | 2 | ||
| Continuous Drain Current (steady state) | ID | 6 | A | TA = +85°C (Note 6) | 2 | ||
| Pulsed Drain Current | IDM | 60 | A | Note 7 | 2 | ||
| Avalanche Current | IAR | 8 | A | Notes 7 & 8 | 2 | ||
| Repetitive Avalanche Energy | EAR | 3.2 | mJ | L = 0.1mH (Notes 7 & 8) | 2 | ||
| Power Dissipation | PD | 1.42 | W | Note 6 | 2 | ||
| Thermal Resistance, Junction to Ambient | RθJA | 88.49 | °C/W | TA = +25°C (Note 6) | 2 | ||
| Operating and Storage Temperature Range | TJ, TSTG | -55 | 150 | °C | 2 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | Copper | tin | Terminal Connections Indicator: See diagram Terminals: Finish Matte Tin annealed over Copper leadframe. | 1 |
CAD (KiCad official)
- Symbol:
DMG4496SSS-13 - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SO-8 (KiCad packages3D, STEP)
- 3D model files:
dmg4496sss-13-etched.step/dmg4496sss-13-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);dmg4496sss-13.step/dmg4496sss-13.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Diodes Incorporated datasheet (6 pp, sha256
0c29795399d78526, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).