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Contents

README

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STB7NK80ZT4

STMicroelectronics · MOSFETs · D2PAK

STB7NK80ZT4 from STMicroelectronics, in a D2PAK. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G input Gate control input with ±30 V absolute maximum rating and 3.00 to 4.50 V gate threshold voltage.
2 D passive Drain power terminal rated for 800 V maximum drain-source voltage, 5.2 A continuous current at 25°C, with 1.8 mΩ maximum on-resistance.
3 S power_in Source terminal with integrated source-drain diode providing 1.6 V forward drop at 5.2 A and 530 ns reverse recovery time at 150°C.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package D2PAK
Category Transistors/Thyristors
Pins 3

CAD (KiCad official)

  • Symbol: STB7NK80ZT4
  • Footprint: Package_TO_SOT_SMD:TO-263-2
  • 3D model: D2PAK (KiCad packages3D, STEP)
  • 3D model files: stb7nk80zt4-etched.step / stb7nk80zt4-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stb7nk80zt4.step / stb7nk80zt4.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (23 pp, sha256 0294a85f426902e7, retrieved 2026-10-01, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF