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CY74FCT2574ATSOC

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Texas Instruments Flip Flops, SOIC-20-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Contents

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CY74FCT2574ATSOC

Texas Instruments · Flip Flops · SOIC-20-300mil

CY74FCT2574ATSOC from Texas Instruments, in a SOIC-20-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OE input Active-low output enable common to all flip-flops; when OE is low the stored flip-flop contents appear at the outputs, and when high the outputs are forced to the high-impedance state without affecting the flip-flops.
2 D0 input Data input to flip-flop 0, captured on the low-to-high transition of CP and subject to the setup-time and hold-time requirements (tsu 2 ns, th 1.5 ns for the AT grade).
3 D1 input Data input to flip-flop 1, captured on the low-to-high transition of CP and subject to the setup-time and hold-time requirements (tsu 2 ns, th 1.5 ns for the AT grade).
4 D2 input Data input to flip-flop 2, captured on the low-to-high transition of CP and subject to the setup-time and hold-time requirements (tsu 2 ns, th 1.5 ns for the AT grade).
5 D3 input Data input to flip-flop 3, captured on the low-to-high transition of CP and subject to the setup-time and hold-time requirements (tsu 2 ns, th 1.5 ns for the AT grade).
6 D4 input Data input to flip-flop 4, captured on the low-to-high transition of CP and subject to the setup-time and hold-time requirements (tsu 2 ns, th 1.5 ns for the AT grade).
7 D5 input Data input to flip-flop 5, captured on the low-to-high transition of CP and subject to the setup-time and hold-time requirements (tsu 2 ns, th 1.5 ns for the AT grade).
8 D6 input Data input to flip-flop 6, captured on the low-to-high transition of CP and subject to the setup-time and hold-time requirements (tsu 2 ns, th 1.5 ns for the AT grade).
9 D7 input Data input to flip-flop 7, captured on the low-to-high transition of CP and subject to the setup-time and hold-time requirements (tsu 2 ns, th 1.5 ns for the AT grade).
10 GND power_in Ground reference; the datasheet requires unused inputs to be held at VCC or GND for proper operation.
11 CP input Buffered clock input common to all flip-flops; data is stored on the low-to-high transition, with a minimum pulse duration of 5 ns for the AT grade.
12 O7 tri_state Three-state output of flip-flop 7 with an on-chip 25-Ω series resistor, rated for 12-mA sink and 15-mA source current, and high-impedance when OE is high.
13 O6 tri_state Three-state output of flip-flop 6 with an on-chip 25-Ω series resistor, rated for 12-mA sink and 15-mA source current, and high-impedance when OE is high.
14 O5 tri_state Three-state output of flip-flop 5 with an on-chip 25-Ω series resistor, rated for 12-mA sink and 15-mA source current, and high-impedance when OE is high.
15 O4 tri_state Three-state output of flip-flop 4 with an on-chip 25-Ω series resistor, rated for 12-mA sink and 15-mA source current, and high-impedance when OE is high.
16 O3 tri_state Three-state output of flip-flop 3 with an on-chip 25-Ω series resistor, rated for 12-mA sink and 15-mA source current, and high-impedance when OE is high.
17 O2 tri_state Three-state output of flip-flop 2 with an on-chip 25-Ω series resistor, rated for 12-mA sink and 15-mA source current, and high-impedance when OE is high.
18 O1 tri_state Three-state output of flip-flop 1 with an on-chip 25-Ω series resistor, rated for 12-mA sink and 15-mA source current, and high-impedance when OE is high.
19 O0 tri_state Three-state output of flip-flop 0 with an on-chip 25-Ω series resistor, rated for 12-mA sink and 15-mA source current, and high-impedance when OE is high.
20 VCC power_in Positive supply; recommended supply voltage is 4.75 V to 5.25 V (5 V nominal).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-20-300mil
Category Logic
Pins 20

CAD (KiCad official)

  • Symbol: CY74FCT2574ATSOC
  • Footprint: Package_SO:SOIC-20W_7.5x12.8mm_P1.27mm
  • 3D model: SOIC-20-300mil (KiCad packages3D, STEP)
  • 3D model files: cy74fct2574atsoc-etched.step / cy74fct2574atsoc-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cy74fct2574atsoc.step / cy74fct2574atsoc.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (16 pp, sha256 cdf87af643e45c94, retrieved 2026-10-10, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF