component
S3D-E3
Public Made by Adomby adom
Vishay Intertech Switching Diodes, DO-214AB(SMC). Unpolarised two-terminal part: the datasheet prints no pin numbers, so pins 1 and 2 follow the library convention, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownS3D-E3
Vishay Intertech · Switching Diodes · DO-214AB(SMC)
S3D-E3 from Vishay Intertech, in a DO-214AB(SMC). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | K | passive | Cathode: the banded/marked end per the datasheet; pad 1 of the KiCad diode footprint. |
| 2 | A | passive | Anode. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Vishay Intertech |
| Package | DO-214AB(SMC) |
| Category | Diodes |
| Pins | 2 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Maximum recurrent peak reverse voltage | VRRM | 200 | V | 1 | |||
| Maximum RMS voltage | VRMS | 140 | V | 1 | |||
| Maximum DC blocking voltage | VDC | 200 | V | 1 | |||
| Maximum average forward rectified current | IF(AV) | 3 | A | TL = 103 °C | 1 | ||
| Peak forward surge current | IFSM | 100 | A | 8.3 ms single half sine-wave superimposed on rated load | 1 | ||
| Operating junction and storage temperature range | TJ, TSTG | -55 | 150 | °C | 1 | ||
| Maximum instantaneous forward voltage | VF | 1.15 | V | 2.5 A | 2 | ||
| Maximum DC reverse current at rated DC blocking voltage | IR | 10 | μA | Rated DC blocking voltage, TA = 25 °C | 2 | ||
| Maximum DC reverse current at rated DC blocking voltage | IR | 250 | μA | Rated DC blocking voltage, TA = 125 °C | 2 | ||
| Typical thermal resistance, junction to ambient | RθJA | 47 | °C/W | Note (1): junction to ambient, PCB with 0.3" x 0.3" (8.0 mm x 8.0 mm) copper pad area | 2 | ||
| Typical thermal resistance, junction to lead | RθJL | 13 | °C/W | Note (1): junction to lead, PCB with 0.3" x 0.3" (8.0 mm x 8.0 mm) copper pad area | 2 |
CAD (KiCad official)
- Symbol:
S3D-E3 - Footprint:
Diode_SMD:D_SMC - 3D model: DO-214AB(SMC) (KiCad packages3D, STEP)
- 3D model files:
s3d-e3-etched.step/s3d-e3-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);s3d-e3.step/s3d-e3.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Vishay Intertech datasheet (4 pp, sha256
cbbe1b2926610966, retrieved 2026-10-15, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins, primarycathode-band convention(convention), consensusoff(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).