component
LT3028IDHC#PBF
Public Made by Adomby adom
Analog Devices Linear Voltage Regulators (LDO), DFN-16-EP(3x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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Contents
README
markdownLT3028IDHC#PBF
Analog Devices · Linear Voltage Regulators (LDO) · DFN-16-EP(3x5)
LT3028IDHC#PBF from Analog Devices, in a DFN-16-EP(3x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | BYP1 | passive | Bypass pin for Output 1 (noise-reduction capacitor, 0.01µF used in the typical application); pin voltage limited to ±0.6V. |
| 2 | NC | unconnected | No connect pin. |
| 3 | OUT1 | power_out | Output 1 regulated output supplying up to 500mA; pin voltage limited to ±20V. |
| 4 | OUT1 | power_out | Output 1 regulated output supplying up to 500mA (second OUT1 pin, same net); pin voltage limited to ±20V. |
| 5 | GND | power_in | Ground pin shared by both regulators. |
| 6 | OUT2 | power_out | Output 2 regulated output supplying up to 100mA; pin voltage limited to ±20V. |
| 7 | OUT2 | power_out | Output 2 regulated output supplying up to 100mA (second OUT2 pin, same net); pin voltage limited to ±20V. |
| 8 | BYP2 | passive | Bypass pin for Output 2 (noise-reduction capacitor, 0.01µF used in the typical application); pin voltage limited to ±0.6V. |
| 9 | ADJ2 | input | Adjust pin for Output 2 with 1.22V reference (typ.); pin voltage limited to ±7V. |
| 10 | SHDN2 | input | Shutdown control for Output 2; pin voltage limited to ±20V. |
| 11 | IN2 | power_in | Input supply for Output 2, operating 1.8V to 20V; pin voltage limited to ±20V. |
| 12 | IN2 | power_in | Input supply for Output 2 (second IN2 pin, same net), operating 1.8V to 20V; pin voltage limited to ±20V. |
| 13 | IN1 | power_in | Input supply for Output 1, operating 1.8V to 20V; pin voltage limited to ±20V. |
| 14 | IN1 | power_in | Input supply for Output 1 (second IN1 pin, same net), operating 1.8V to 20V; pin voltage limited to ±20V. |
| 15 | SHDN1 | input | Shutdown control for Output 1; pin voltage limited to ±20V. |
| 16 | ADJ1 | input | Adjust pin for Output 1 with 1.22V reference (typ.); pin voltage limited to ±7V. |
| 17 | GND | power_in | Exposed pad is GND and must be soldered to the PCB. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | DFN-16-EP(3x5) |
| Category | Power Management ICs |
| Pins | 17 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Minimum Input Voltage Output 2 | VIN | 1.8 | 2.3 | V | Output 2, ILOAD = 100mA, full temp range | 2 | |
| Minimum Input Voltage Output 1 | VIN | 1.8 | 2.3 | V | Output 1, ILOAD = 500mA, full temp range | 2 | |
| ADJ Pin Voltage | VADJ | 1.205 | 1.22 | 1.235 | V | VIN = 2V, ILOAD = 1mA | 2 |
| ADJ Pin Voltage Output 2 | VADJ | 1.19 | 1.22 | 1.25 | V | Output 2, 2.3V < VIN2 < 20V, 1mA < ILOAD < 100mA | 2 |
| ADJ Pin Voltage Output 1 | VADJ | 1.19 | 1.22 | 1.25 | V | Output 1, 2.3V < VIN1 < 20V, 1mA < ILOAD < 500mA | 2 |
| Line Regulation | 1 | 10 | mV | ΔVIN = 2V to 20V, ILOAD = 1mA | 2 | ||
| Load Regulation Output 2 | 1 | 12 | mV | VIN2 = 2.3V, ΔILOAD = 1mA to 100mA | 2 | ||
| Load Regulation Output 2 (full temp) | 25 | mV | VIN2 = 2.3V, ΔILOAD = 1mA to 100mA | 2 | |||
| Load Regulation Output 1 | 1 | 12 | mV | VIN1 = 2.3V, ΔILOAD = 1mA to 500mA | 2 | ||
| Load Regulation Output 1 (full temp) | 25 | mV | VIN1 = 2.3V, ΔILOAD = 1mA to 500mA | 2 | |||
| Dropout Voltage Output 2 | 0.3 | 0.35 | V | ILOAD = 100mA | 3 | ||
| Dropout Voltage Output 2 (full temp) | 0.45 | V | ILOAD = 100mA | 3 | |||
| Dropout Voltage Output 1 | 0.32 | 0.37 | V | ILOAD = 500mA | 3 | ||
| Dropout Voltage Output 1 (full temp) | 0.47 | V | ILOAD = 500mA | 3 | |||
| GND Pin Current Output 2 | 25 | 50 | µA | ILOAD = 0mA | 3 | ||
| GND Pin Current Output 2 | 2.2 | 4 | mA | ILOAD = 100mA | 3 | ||
| GND Pin Current Output 1 | 30 | 75 | µA | ILOAD = 0mA | 3 | ||
| GND Pin Current Output 1 | 10 | 16 | mA | ILOAD = 500mA | 3 | ||
| Output Voltage Noise | 20 | µVRMS | COUT = 10µF, CBYP = 0.01µF, ILOAD = Full Current, BW = 10Hz to 100kHz | 3 | |||
| ADJ Pin Bias Current | 30 | 100 | nA | ADJ1, ADJ2 | 3 | ||
| Shutdown Threshold (Off to On) | 0.8 | 1.4 | V | VOUT = Off to On | 3 | ||
| Shutdown Threshold (On to Off) | 0.25 | 0.65 | V | VOUT = On to Off | 3 | ||
| SHDN Pin Current | 0 | 0.5 | µA | VSHDN1, VSHDN2 = 0V | 3 | ||
| SHDN Pin Current | 1 | 3 | µA | VSHDN1, VSHDN2 = 20V | 3 | ||
| Quiescent Current in Shutdown | 0.01 | 0.1 | µA | VIN = 6V, VSHDN1 = 0V, VSHDN2 = 0V | 3 | ||
| Ripple Rejection | 55 | 65 | dB | VIN = 2.72V (Avg), VRIPPLE = 0.5VP-P, fRIPPLE = 120Hz, ILOAD = Full Current | 3 | ||
| Current Limit Output 2 | 500 | mA | VIN2 = 7V, VOUT2 = 0V | 3 | |||
| Current Limit Output 2 | 110 | mA | VIN2 = 2.3V, ΔVOUT2 = -0.1V | 3 | |||
| Current Limit Output 1 | 1.3 | A | VIN1 = 7V, VOUT1 = 0V | 3 | |||
| Current Limit Output 1 | 520 | mA | VIN1 = 2.3V, ΔVOUT1 = -0.1V | 3 | |||
| Input Reverse Leakage Current | 1 | mA | VIN = -20V, VOUT = 0V | 3 | |||
| IN1, IN2 Pin Voltage | -20 | 20 | V | 2 | |||
| OUT1, OUT2 Pin Voltage | -20 | 20 | V | 2 | |||
| Input-to-Output Differential Voltage | -20 | 20 | V | 2 | |||
| ADJ1, ADJ2 Pin Voltage | -7 | 7 | V | 2 | |||
| BYP1, BYP2 Pin Voltage | -0.6 | 0.6 | V | 2 | |||
| SHDN1, SHDN2 Pin Voltage | -20 | 20 | V | 2 | |||
| Operating Junction Temperature Range | TJ | -40 | 125 | °C | LT3028I | 2 | |
| Storage Temperature Range (DHC) | -65 | 125 | °C | DHC Package | 2 | ||
| Lead Temperature (Soldering, 10 sec) | 300 | °C | 2 | ||||
| Thermal Resistance Junction-to-Ambient | θJA | 40 | °C/W | DHC package, TJMAX = 125°C | 2 | ||
| Thermal Resistance Junction-to-Case | θJC | 10 | °C/W | DHC package, at Exposed Pad | 2 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | COPPER | Table 1. FE Package, 16-Lead TSSOP COPPER AREA THERMAL RESISTANCE | 13 |
CAD (KiCad official)
- Symbol:
LT3028IDHC#PBF - Footprint:
Package_DFN_QFN:DFN-16-1EP_3x5mm_P0.5mm_EP1.66x4.4mm - 3D model: DFN-16-EP(3x5) (KiCad packages3D, STEP)
- 3D model files:
lt3028idhc-pbf-etched.step/lt3028idhc-pbf-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);lt3028idhc-pbf.step/lt3028idhc-pbf.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Analog Devices datasheet (16 pp, sha256
cd20ff65314e917e, retrieved 2026-10-30, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).