Loads when you scroll to it. Unloads after 5 minutes in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

PCB Footprint

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Loads when you scroll to it. Unloads after 5 minutes in the background.
Download PDF
Contents

README

markdown

MAX3490ESA+T

ElecSuper · RS-485 / RS-422 ICs · SOP-8

MAX3490ESA+T from ElecSuper, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VCC power_in Supply pin; the device operates from 3.0 V to 5.5 V, with an absolute maximum VCC of +7 V.
2 RO output Receiver output: driven high when A-B is at or above +200 mV and low when A-B is at or below -200 mV.
3 DI input Driver input: low drives Y low and Z high, high drives Y high and Z low; VIH minimum is 2.0 V, VIL maximum is 0.8 V, and absolute range is -0.3 V to VCC+0.3 V.
4 GND power_in Ground reference; all voltages on the device are referenced to this pin.
5 Y output Non-inverting driver output that follows DI, with short-circuit output current limited to 250 mA maximum per the electrical table.
6 Z output Inverting driver output, complementary to Y, with short-circuit output current limited to 250 mA maximum per the electrical table.
7 B input Inverting receiver input on the bus, with an absolute bus-side input voltage range of -8 V to +13 V.
8 A input Non-inverting receiver input on the bus, with an absolute bus-side input voltage range of -8 V to +13 V.

Key specifications

Parameter Value
Manufacturer ElecSuper
Package SOP-8
Category Interface
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VCC VCC 3 5.5 V Product description (3.0V~5.5V supply) 1
Supply voltage VCC (absolute maximum) VCC 7 V 2
Control port voltage DI DI -0.3 V Printed as -0.3~VCC+0.3 2
Bus-side input voltage A, B A, B -8 13 V 2
Receiver output voltage RO RO -0.3 V Printed as -0.3~VCC+0.3 2
Operating ambient temperature range Tamb -40 125 °C 2
Storage temperature range Tstg -60 150 °C 2
Soldering temperature range 300 °C 2
Continuous power dissipation SOP8 400 mW SOP8 package 2
Driver differential output (no load) VOD1 5 V VCC=5V 3
Driver differential output VOD2 1.5 V Figure 2, RL = 54 Ω 3
Change in magnitude of differential output voltage ΔVOD 0.2 V Figure 2, RL = 54 Ω 3
Output common-mode voltage VOC 3 V Figure 2, RL = 54 Ω 3
Change in magnitude of common-mode output voltage ΔVOC 0.2 V Figure 2, RL = 54 Ω 3
Logic input high voltage VIH 2 V DI 3
Logic input low voltage VIL 0.8 V DI 3
Logic input current IIN1 -2 2 uA DI 3
Output short-circuit current, short to high IOSD1 35 250 mA Short to 0V~12V 3
Output short-circuit current, short to low IOSD2 -250 -35 mA Short to -7V~0V 3
Receiver input current (A, B) IIN2 125 uA VCC=0 or 3.3V, VIN = 12 V 3
Receiver input current (A, B) IIN2 -100 uA VCC=0 or 3.3V, VIN = -7V 3
Positive input threshold voltage VIT+ 200 mV -7V≤VCM≤12V 3
Negative input threshold voltage VIT- -200 mV -7V≤VCM≤12V 3
Input hysteresis voltage Vhys 10 30 mV -7V≤VCM≤12V 3
Output low voltage VOL 0.4 V IOUT = +4mA, VID = -200 mV 3
Three-state input leakage current IOZR -1 1 uA 0.4V<VO<2.4V 4
Receiver input resistance RIN 96 kΩ -7V≤VCM≤12V 4
Receiver short-circuit current IOSR -95 95 mA 0 V≤VO≤VCC 4
Supply current ICC 240 400 uA DI = 0 V or VCC 4
ESD HBM, A, B, Y, Z ports -15 15 kV Human body model 4
ESD HBM, other ports -6 6 kV Human body model 4
Driver propagation delay, low to high tPLH 15 35 ns RL=54Ω, CL=100pF, see Figures 3 and 4 4
Driver propagation delay, high to low tPHL 15 35 ns RL=54Ω, CL=100pF, see Figures 3 and 4 4
Driver differential output skew tSKEW1 7 10 ns RL=54Ω, CL=100pF 4
Differential output delay / transition time tDD, tTD 10 25 ns RL=54Ω, CL=100pF 4
Receiver input to output propagation delay, low to high tRPLH 20 60 90 ns VID≥2.0V; rise and fall time ≤15ns 4
Receiver input to output propagation delay, high to low tRPHL 20 60 90 ns VID≥2.0V; rise and fall time ≤15ns 4
Receiver output skew tSKEW2 7 10 ns 4

CAD (KiCad official)

  • Symbol: MAX3490ESA+T
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: max3490esa-t-etched.step / max3490esa-t-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); max3490esa-t.step / max3490esa-t.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: ElecSuper datasheet (11 pp, sha256 ec4f7a669703c158, retrieved 2026-10-18, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF