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Contents

README

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LMV324-SR

Gainsil · Operational Amplifier · SOP-14

LMV324-SR from Gainsil, in a SOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OUTA output Output of amplifier A. Rail-to-rail output; swings within ~5mV of the supply rails into a 100kΩ load and can source/sink up to ~60mA (short-circuit).
2 INA- input Inverting input of amplifier A. High-impedance CMOS input, typical bias current 1pA. Common-mode range extends from VSS−0.1V to VDD+0.1V.
3 INA+ input Non-inverting input of amplifier A. High-impedance CMOS input, typical bias current 1pA. Common-mode range extends from VSS−0.1V to VDD+0.1V.
4 VDD power_in Positive supply. Operating range 2.1V to 5.5V single-supply (or ±1.05V to ±2.75V dual-supply). Bypass with a 0.1µF ceramic capacitor to VSS close to the pin. Absolute max VDD−VSS = 7.5V.
5 INB+ input Non-inverting input of amplifier B. High-impedance CMOS input, typical bias current 1pA. Common-mode range extends from VSS−0.1V to VDD+0.1V.
6 INB- input Inverting input of amplifier B. High-impedance CMOS input, typical bias current 1pA. Common-mode range extends from VSS−0.1V to VDD+0.1V.
7 OUTB output Output of amplifier B. Rail-to-rail output; swings within ~5mV of the supply rails into a 100kΩ load and can source/sink up to ~60mA (short-circuit).
8 OUTC output Output of amplifier C. Rail-to-rail output; swings within ~5mV of the supply rails into a 100kΩ load and can source/sink up to ~60mA (short-circuit).
9 INC- input Inverting input of amplifier C. High-impedance CMOS input, typical bias current 1pA. Common-mode range extends from VSS−0.1V to VDD+0.1V.
10 INC+ input Non-inverting input of amplifier C. High-impedance CMOS input, typical bias current 1pA. Common-mode range extends from VSS−0.1V to VDD+0.1V.
11 VSS power_in Negative supply / ground. Tie to 0V in single-supply operation, or to the negative rail in dual-supply operation. Bypass with a 0.1µF ceramic capacitor.
12 IND+ input Non-inverting input of amplifier D. High-impedance CMOS input, typical bias current 1pA. Common-mode range extends from VSS−0.1V to VDD+0.1V.
13 IND- input Inverting input of amplifier D. High-impedance CMOS input, typical bias current 1pA. Common-mode range extends from VSS−0.1V to VDD+0.1V.
14 OUTD output Output of amplifier D. Rail-to-rail output; swings within ~5mV of the supply rails into a 100kΩ load and can source/sink up to ~60mA (short-circuit).

Key specifications

Parameter Value
Manufacturer Gainsil
Package SOP-14
Category Op-amp/Cmp
Pins 14

Ordering variants

Same part, different packaging or reel option.

  • LMV324-SR
  • LMV358-SR
  • LMV321-TR

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Power Supply Voltage (VDD to Vss) -0.5 7.5 V 2
Analog Input Voltage (IN+ or IN-) -0.5 0.5 V Printed as Min Vss-0.5V, Max VDD+0.5V; values are the offsets from the supply rails 2
PDB Input Voltage -0.5 7 V Printed as Min Vss-0.5V; offset from Vss 2
Operating Temperature Range -40 125 °C 2
Storage Temperature Range -55 150 °C 2
Junction Temperature 160 °C 2
Lead Temperature (soldering, 10sec) 260 °C soldering, 10 sec 2
ESD Susceptibility HBM 6 KV HBM 2
ESD Susceptibility MM 300 V MM 2
Input Offset Voltage VOS 0.4 3.5 mV VCM = VS/2; +25°C 3
Input Offset Voltage VOS 5.6 mV VCM = VS/2; -40°C to +85°C 3
Common-Mode Rejection Ratio CMRR 62 70 dB VS = 5.5V, VCM = -0.1V to 4V; +25°C 3
Common-Mode Rejection Ratio CMRR 62 dB VS = 5.5V, VCM = -0.1V to 4V; -40°C to +85°C 3
Common-Mode Rejection Ratio CMRR 56 68 dB VS = 5.5V, VCM = -0.1V to 5.6V; +25°C 3
Common-Mode Rejection Ratio CMRR 55 dB VS = 5.5V, VCM = -0.1V to 5.6V; -40°C to +85°C 3
Open-Loop Voltage Gain AOL 70 80 dB RL = 5kΩ, VO = +0.1V to +4.9V; +25°C 3
Open-Loop Voltage Gain AOL 70 dB RL = 5kΩ, VO = +0.1V to +4.9V; -40°C to +85°C 3
Open-Loop Voltage Gain AOL 94 100 dB RL = 10kΩ, VO = +0.1V to +4.9V; +25°C 3
Open-Loop Voltage Gain AOL 85 dB RL = 10kΩ, VO = +0.1V to +4.9V; -40°C to +85°C 3
Output Voltage Swing from Rail (high) VOH 4.99 4.997 V RL = 100kΩ; +25°C 3
Output Voltage Swing from Rail (high) VOH 4.98 V RL = 100kΩ; -40°C to +85°C 3
Output Voltage Swing from Rail (low) VOL 3 10 mV RL = 100kΩ; +25°C 3
Output Voltage Swing from Rail (low) VOL 20 mV RL = 100kΩ; -40°C to +85°C 3
Output Voltage Swing from Rail (high) VOH 4.97 4.992 V RL = 10kΩ; +25°C 3
Output Voltage Swing from Rail (high) VOH 4.96 V RL = 10kΩ; -40°C to +85°C 3
Output Voltage Swing from Rail (low) VOL 8 30 mV RL = 10kΩ; +25°C 3
Output Voltage Swing from Rail (low) VOL 40 mV RL = 10kΩ; -40°C to +85°C 3
Output Current (source) ISOURCE 60 84 mA RL = 10Ω to VS/2; +25°C 3
Output Current (source) ISOURCE 45 mA RL = 10Ω to VS/2; -40°C to +85°C 3
Output Current (sink) ISINK 60 75 mA +25°C 3
Output Current (sink) ISINK 45 mA -40°C to +85°C 3
Operating Voltage Range (minimum supply) 2.1 V +25°C 3
Operating Voltage Range (minimum supply) 2.5 V -40°C to +85°C 3
Operating Voltage Range (maximum supply) 5.5 V +25°C 3
Common-Mode Voltage Range VCM -0.1 5.6 V VS = 5.5V; printed as a range -0.1 to +5.6 V under TYP 3
Power Supply Rejection Ratio PSRR 60 82 dB VS = +2.5V to +5.5V, VCM = +0.5V; +25°C 3
Power Supply Rejection Ratio PSRR 58 dB VS = +2.5V to +5.5V, VCM = +0.5V; -40°C to +85°C 3
Input Bias Current IB 1 pA 3
Input Offset Current IOS 1 pA 3
Input Offset Voltage Drift ∆VOS/∆T 2.7 µV/℃ 3
Quiescent Current / Amplifier IQ 40 µA 3
Gain-Bandwidth Product GBP 1 MHz CL = 100pF 3
Slew Rate SR 0.6 V/µs CL = 100pF; G = +1, 2V Output Step 3
Settling Time to 0.1% tS 5 µs CL = 100pF; G = +1, 2V Output Step 3
Overload Recovery Time 2.6 µs CL = 100pF; VIN ·Gain = VS 3
Voltage Noise Density en 27 nV / Hz f = 1kHz 3
Voltage Noise Density en 20 nV / Hz f = 10kHz 3

CAD (KiCad official)

  • Symbol: LMV324-SR
  • Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
  • 3D model: SOP-14 (KiCad packages3D, STEP)
  • 3D model files: lmv324-sr-etched.step / lmv324-sr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lmv324-sr.step / lmv324-sr.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
lmv324-sr.step 195 KB You want the bare part, or you mark your own boards.
lmv324-sr-etched.step 2.1 MB You want the part with LMV324-SR already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 528 faces against 237 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Gainsil datasheet (12 pp, sha256 3e4d4c64aa5067d2, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF