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SP3232EBEY-L

MaxLinear · RS232 ICs · TSSOP-16

SP3232EBEY-L from MaxLinear, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 C1+ passive Positive terminal of the voltage-doubler charge-pump capacitor C1 (0.1µF between C1+ and C1-).
2 V+ power_out +5.5V charge-pump output. Bypass to GND with a 0.1µF capacitor (C3).
3 C1- passive Negative terminal of the voltage-doubler charge-pump capacitor C1.
4 C2+ passive Positive terminal of the inverting charge-pump capacitor C2 (0.1µF between C2+ and C2-).
5 C2- passive Negative terminal of the inverting charge-pump capacitor C2.
6 V- power_out -5.5V charge-pump output. Bypass to GND with a 0.1µF capacitor (C4).
7 T2OUT output RS-232 driver #2 output. Typical ±5.4V no-load swing, ±5.0V loaded with 3kΩ to GND; internally slew-rate limited to ≤30V/µs; short-circuit protected.
8 R2IN input RS-232 receiver #2 input. ±15V input range (±25V absolute max); 3-7kΩ input impedance with internal 5kΩ pulldown to GND so an unconnected input drives the receiver output HIGH.
9 R2OUT output TTL/CMOS receiver #2 output (inverted from R2IN). VOL≤0.4V @ 1.6mA sink; VOH≥VCC-0.6V @ 1.0mA source.
10 T2IN input TTL/CMOS driver #2 input. Logic-LOW ≤0.8V; logic-HIGH ≥2.0V (VCC=3.3V) or ≥2.4V (VCC=5.0V); ~250mV hysteresis. No internal pull-up - tie unused inputs to VCC or GND.
11 T1IN input TTL/CMOS driver #1 input. Logic-LOW ≤0.8V; logic-HIGH ≥2.0V (VCC=3.3V) or ≥2.4V (VCC=5.0V); ~250mV hysteresis. No internal pull-up - tie unused inputs to VCC or GND.
12 R1OUT output TTL/CMOS receiver #1 output (inverted from R1IN). VOL≤0.4V @ 1.6mA sink; VOH≥VCC-0.6V @ 1.0mA source.
13 R1IN input RS-232 receiver #1 input. ±15V input range (±25V absolute max); 3-7kΩ input impedance with internal 5kΩ pulldown to GND so an unconnected input drives the receiver output HIGH.
14 T1OUT output RS-232 driver #1 output. Typical ±5.4V no-load swing, ±5.0V loaded with 3kΩ to GND; internally slew-rate limited to ≤30V/µs; short-circuit protected.
15 GND power_in Ground reference. Common return for logic side, charge pump, and RS-232 loads.
16 VCC power_in +3.0V to +5.5V main supply. Bypass to GND with a 0.1µF ceramic capacitor (C5) placed close to the pin; on noise-sensitive rails match C5 to C1's value.

Key specifications

Parameter Value
Manufacturer MaxLinear
Package TSSOP-16
Category Interface
Pins 16

Ordering variants

Same part, different packaging or reel option.

  • SP3232EBEY-L
  • SP3232EBEY-LCY
  • SP3232EBEY-LET
  • SP3232EBEY-LWY

CAD (KiCad official)

  • Symbol: SP3232EBEY-L
  • Footprint: Package_SO:TSSOP-16_4.4x5mm_P0.65mm
  • 3D model: TSSOP-16 (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: MaxLinear datasheet (23 pp, sha256 ead6ac08cdfd4a83, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF