Loads when you scroll to it. Unloads after 5 minutes in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

PCB Footprint

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Loads when you scroll to it. Unloads after 5 minutes in the background.
Download PDF
Contents

README

markdown

RS4G08XP

Jiangsu RUNIC Tech · Logic Gates · SOIC-14

RS4G08XP from Jiangsu RUNIC Tech, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1A input Channel 1 logic input A; unused inputs must be held at VCC or GND, accepts voltage up to 5.5V.
2 1B input Channel 1 logic input B; unused inputs must be held at VCC or GND, accepts voltage up to 5.5V.
3 1Y output Channel 1 logic level output (Y = A•B), drive of ±24mA at VCC=3.0V.
4 2A input Channel 2 logic input A; unused inputs must be held at VCC or GND, accepts voltage up to 5.5V.
5 2B input Channel 2 logic input B; unused inputs must be held at VCC or GND, accepts voltage up to 5.5V.
6 2Y output Channel 2 logic level output (Y = A•B), drive of ±24mA at VCC=3.0V.
7 GND power_in Ground.
8 3Y output Channel 3 logic level output (Y = A•B), drive of ±24mA at VCC=3.0V.
9 3A input Channel 3 logic input A; unused inputs must be held at VCC or GND, accepts voltage up to 5.5V.
10 3B input Channel 3 logic input B; unused inputs must be held at VCC or GND, accepts voltage up to 5.5V.
11 4Y output Channel 4 logic level output (Y = A•B), drive of ±24mA at VCC=3.0V.
12 4A input Channel 4 logic input A; unused inputs must be held at VCC or GND, accepts voltage up to 5.5V.
13 4B input Channel 4 logic input B; unused inputs must be held at VCC or GND, accepts voltage up to 5.5V.
14 VCC power_in Power supply, operating range 1.65V to 5.5V.

Key specifications

Parameter Value
Manufacturer Jiangsu RUNIC Tech
Package SOIC-14
Category Logic
Pins 14

CAD (KiCad official)

  • Symbol: RS4G08XP
  • Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
  • 3D model: SOIC-14 (KiCad packages3D, STEP)
  • 3D model files: rs4g08xp-etched.step / rs4g08xp-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); rs4g08xp.step / rs4g08xp.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Jiangsu RUNIC Tech datasheet (11 pp, sha256 285746c47831f40c, retrieved 2026-10-22, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF