component
OPA4140AID
Public Made by Adomby adom
Texas Instruments FET Input Amplifiers, SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownOPA4140AID
Texas Instruments · FET Input Amplifiers · SOIC-14
OPA4140AID from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUT A | output | Output of channel A. |
| 2 | -IN A | input | Inverting input of channel A. |
| 3 | +IN A | input | Noninverting input of channel A. |
| 4 | V+ | power_in | Positive (highest) power supply. |
| 5 | +IN B | input | Noninverting input of channel B. |
| 6 | -IN B | input | Inverting input of channel B. |
| 7 | OUT B | output | Output of channel B. |
| 8 | OUT C | output | Output of channel C. |
| 9 | -IN C | input | Inverting input of channel C. |
| 10 | +IN C | input | Noninverting input of channel C. |
| 11 | V- | power_in | Negative (lowest) power supply. |
| 12 | +IN D | input | Noninverting input of channel D. |
| 13 | -IN D | input | Inverting input of channel D. |
| 14 | OUT D | output | Output of channel D. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-14 |
| Category | Amplifiers/Comparators |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input offset voltage | VOS | -120 | 30 | 120 | μV | 7 | |
| Input offset voltage | VOS | -220 | 220 | μV | VS = ±18 V, TA = –40°C to +125°C | 7 | |
| Input offset voltage vs supply voltage (row label not printed in extracted text) | -4 | 4 | μV/V | VS = ±2.25 V to ±18 V, TA = –40°C to +125°C | 7 | ||
| Input offset voltage drift | dVOS/dT | -1 | 0.35 | 1 | μV/°C | VS = ±18 V, TA = –40°C to +125°C | 7 |
| Power-supply rejection ratio | PSRR | -0.5 | 0.1 | 0.5 | μV/V | VS = ±2.25 V to ±18 V, TA = –40°C to +125°C | 7 |
| Input bias current | IB | -10 | 0.5 | 10 | pA | 7 | |
| Input bias current | IB | -3 | 3 | nA | TA = –40°C to +125°C | 7 | |
| Input offset current | IOS | -10 | 0.5 | 10 | pA | 7 | |
| Input offset current | IOS | -1 | 1 | nA | TA = –40°C to +125°C | 7 | |
| Common-mode rejection ratio | CMRR | 126 | 140 | dB | VS = ±18 V, VCM = (V–) – 0.1 V to (V+) – 3.5 V | 7 | |
| Common-mode rejection ratio | CMRR | 120 | dB | TA = –40°C to +125°C | 7 | ||
| Open-loop voltage gain | AOL | 120 | 126 | dB | VO = (V–) + 0.35 V to (V+) – 0.35 V, RL = 10 kΩ | 7 | |
| Open-loop voltage gain | AOL | 114 | 126 | dB | VO = (V–) + 0.35 V to (V+) – 0.35 V, RL = 2 kΩ | 7 | |
| Open-loop voltage gain | AOL | 108 | dB | TA = –40°C to +125°C | 7 | ||
| Quiescent current per amplifier | IQ | 1.8 | 2 | mA | IO = 0 mA | 8 | |
| Quiescent current per amplifier | IQ | 2.7 | mA | TA = –40°C to +125°C | 8 | ||
| Human-body model ESD rating | V(ESD) HBM | -2000 | 2000 | V | Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 | 5 | |
| Charged-device model ESD rating | V(ESD) CDM | -500 | 500 | V | Charged-device model (CDM), per JEDEC JESD22-C101 | 5 | |
| Supply voltage, (V+) – (V–), dual supply | VS | 20 | V | Dual supply, printed as ±20 V | 5 | ||
| Supply voltage, (V+) – (V–), single supply | VS | 40 | V | Single supply | 5 | ||
| Signal input pins current | -10 | 10 | mA | Signal input pins, printed as ±10 mA | 5 | ||
| Ambient temperature | TA | -55 | 150 | °C | 5 | ||
| Junction temperature | TJ | 150 | °C | 5 | |||
| Storage temperature | Tstg | -65 | 150 | °C | 5 | ||
| Supply voltage, (V+) – (V–), dual supply | VS | 2.25 | 18 | V | Dual supply, printed as ±2.25 V (MIN) and ±18 V (MAX) | 5 | |
| Supply voltage, (V+) – (V–), single supply | VS | 4.5 | 36 | V | Single supply | 5 | |
| Ambient temperature | TA | -40 | 125 | °C | 5 | ||
| Junction-to-ambient thermal resistance | RθJA | 97 | °C/W | D (SOIC) 14-pin package | 6 | ||
| Junction-to-case (top) thermal resistance | RθJC(top) | 56 | °C/W | D (SOIC) 14-pin package | 6 | ||
| Junction-to-board thermal resistance | RθJB | 53 | °C/W | D (SOIC) 14-pin package | 6 | ||
| Junction-to-top characterization parameter | ΨJT | 19 | °C/W | D (SOIC) 14-pin package | 6 | ||
| Junction-to-board characterization parameter | ΨJB | 46 | °C/W | D (SOIC) 14-pin package | 6 |
CAD (KiCad official)
- Symbol:
OPA4140AID - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOIC-14 (KiCad packages3D, STEP)
- 3D model files:
opa4140aid-etched.step/opa4140aid-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);opa4140aid.step/opa4140aid.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (57 pp, sha256
f02a9615dc1b5780, retrieved 2026-10-11, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).