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STM32F103ZFT6
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-144(20x20). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSTM32F103ZFT6
STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-144(20x20)
STM32F103ZFT6 from STMicroelectronics, in a LQFP-144(20x20). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PE2 | bidirectional | 5 V-tolerant (FT) I/O; default function PE2, alternate functions TRACECK and FSMC_A23. |
| 2 | PE3 | bidirectional | 5 V-tolerant (FT) I/O; default function PE3, alternate functions TRACED0 and FSMC_A19. |
| 3 | PE4 | bidirectional | 5 V-tolerant (FT) I/O; default function PE4, alternate functions TRACED1 and FSMC_A20. |
| 4 | PE5 | bidirectional | 5 V-tolerant (FT) I/O; default function PE5, alternate functions TRACED2 and FSMC_A21, remap TIM9_CH1. |
| 5 | PE6 | bidirectional | 5 V-tolerant (FT) I/O; default function PE6, alternate functions TRACED3 and FSMC_A22, remap TIM9_CH2. |
| 6 | VBAT | power_in | Backup power supply for the RTC and backup registers; it also feeds PC13 to PC15 through the power switch. |
| 7 | PC13-TAMPER-RTC | bidirectional | I/O (no FT); main function PC13 after first backup-domain power-up, alternate TAMPER-RTC; supplied through a power switch sinking only 3 mA, so speed is limited to 2 MHz at 30 pF and it must not source current such as an LED. |
| 8 | PC14-OSC32_IN | bidirectional | I/O (no FT); main function PC14, alternate OSC32_IN; supplied through the 3 mA power switch, so output speed is limited to 2 MHz at 30 pF and it must not source current. |
| 9 | PC15-OSC32_OUT | bidirectional | I/O (no FT); main function PC15, alternate OSC32_OUT; supplied through the 3 mA power switch, so output speed is limited to 2 MHz at 30 pF and it must not source current. |
| 10 | PF0 | bidirectional | 5 V-tolerant (FT) I/O; default function PF0, alternate function FSMC_A0. |
| 11 | PF1 | bidirectional | 5 V-tolerant (FT) I/O; default function PF1, alternate function FSMC_A1. |
| 12 | PF2 | bidirectional | 5 V-tolerant (FT) I/O; default function PF2, alternate function FSMC_A2. |
| 13 | PF3 | bidirectional | 5 V-tolerant (FT) I/O; default function PF3, alternate function FSMC_A3. |
| 14 | PF4 | bidirectional | 5 V-tolerant (FT) I/O; default function PF4, alternate function FSMC_A4. |
| 15 | PF5 | bidirectional | 5 V-tolerant (FT) I/O; default function PF5, alternate function FSMC_A5. |
| 16 | VSS_5 | power_in | Ground pin for the device (VSS_5). |
| 17 | VDD_5 | power_in | Digital supply pin (VDD_5); application supply and I/Os range 2.0 to 3.6 V. |
| 18 | PF6 | bidirectional | 5 V-tolerant (FT) I/O; default function PF6, alternate functions ADC3_IN4 and FSMC_NIORD, remap TIM10_CH1. |
| 19 | PF7 | bidirectional | 5 V-tolerant (FT) I/O; default function PF7, alternate functions ADC3_IN5 and FSMC_NREG, remap TIM11_CH1. |
| 20 | PF8 | bidirectional | 5 V-tolerant (FT) I/O; default function PF8, alternate functions ADC3_IN6 and FSMC_NIOWR, remap TIM13_CH1. |
| 21 | PF9 | bidirectional | 5 V-tolerant (FT) I/O; default function PF9, alternate functions ADC3_IN7 and FSMC_CD, remap TIM14_CH1. |
| 22 | PF10 | bidirectional | 5 V-tolerant (FT) I/O; default function PF10, alternate functions ADC3_IN8 and FSMC_INTR. |
| 23 | OSC_IN | input | Input of the 4 to 16 MHz high-speed crystal oscillator; PD0 is available separately on pin 114 for this package. |
| 24 | OSC_OUT | output | Output of the 4 to 16 MHz high-speed crystal oscillator; PD1 is available separately on pin 115 for this package. |
| 25 | NRST | bidirectional | Reset pin (NRST), typed I/O in Table 5; its electrical characteristics are given in section 5.3.15. |
| 26 | PC0 | bidirectional | I/O (no FT); default function PC0, alternate function ADC123_IN10. |
| 27 | PC1 | bidirectional | I/O (no FT); default function PC1, alternate function ADC123_IN11. |
| 28 | PC2 | bidirectional | I/O (no FT); default function PC2, alternate function ADC123_IN12. |
| 29 | PC3 | bidirectional | I/O (no FT); default function PC3, alternate function ADC123_IN13. |
| 30 | VSSA | power_in | Analog ground pin for the ADC, DAC and other analog blocks (VSSA). |
| 31 | VREF- | power_in | Negative reference voltage for the ADC; depending on the package it can be connected internally to VSSA. |
| 32 | VREF+ | power_in | Positive reference voltage for the ADC, 2.4 V to VDDA; depending on the package it can be connected internally to VDDA. |
| 33 | VDDA | power_in | Analog supply pin for the ADC and DAC; ADC VDDA range is 2.4 to 3.6 V. |
| 34 | PA0-WKUP | bidirectional | I/O (no FT); default function PA0, alternate functions WKUP, USART2_CTS, ADC123_IN0, TIM2_CH1_ETR, TIM5_CH1 and TIM8_ETR. |
| 35 | PA1 | bidirectional | I/O (no FT); default function PA1, alternate functions USART2_RTS, ADC123_IN1, TIM5_CH2 and TIM2_CH2. |
| 36 | PA2 | bidirectional | I/O (no FT); default function PA2, alternate functions USART2_TX, TIM5_CH3, ADC123_IN2, TIM9_CH1 and TIM2_CH3. |
| 37 | PA3 | bidirectional | I/O (no FT); default function PA3, alternate functions USART2_RX, TIM5_CH4, ADC123_IN3, TIM2_CH4 and TIM9_CH2. |
| 38 | VSS_4 | power_in | Ground pin for the device (VSS_4). |
| 39 | VDD_4 | power_in | Digital supply pin (VDD_4); application supply and I/Os range 2.0 to 3.6 V. |
| 40 | PA4 | bidirectional | I/O (no FT); default function PA4, alternate functions SPI1_NSS, USART2_CK, DAC_OUT1 and ADC12_IN4. |
| 41 | PA5 | bidirectional | I/O (no FT); default function PA5, alternate functions SPI1_SCK, DAC_OUT2 and ADC12_IN5. |
| 42 | PA6 | bidirectional | I/O (no FT); default function PA6, alternate functions SPI1_MISO, TIM8_BKIN, ADC12_IN6, TIM3_CH1 and TIM13_CH1, remap TIM1_BKIN. |
| 43 | PA7 | bidirectional | I/O (no FT); default function PA7, alternate functions SPI1_MOSI, TIM8_CH1N, ADC12_IN7, TIM3_CH2 and TIM14_CH1, remap TIM1_CH1N. |
| 44 | PC4 | bidirectional | I/O (no FT); default function PC4, alternate function ADC12_IN14. |
| 45 | PC5 | bidirectional | I/O (no FT); default function PC5, alternate function ADC12_IN15. |
| 46 | PB0 | bidirectional | I/O (no FT); default function PB0, alternate functions ADC12_IN8, TIM3_CH3 and TIM8_CH2N, remap TIM1_CH2N. |
| 47 | PB1 | bidirectional | I/O (no FT); default function PB1, alternate functions ADC12_IN9, TIM3_CH4 and TIM8_CH3N, remap TIM1_CH3N. |
| 48 | PB2/BOOT1 | bidirectional | 5 V-tolerant (FT) I/O; default function PB2, shared with the BOOT1 pin. |
| 49 | PF11 | bidirectional | 5 V-tolerant (FT) I/O; default function PF11, alternate function FSMC_NIOS16. |
| 50 | PF12 | bidirectional | 5 V-tolerant (FT) I/O; default function PF12, alternate function FSMC_A6. |
| 51 | VSS_6 | power_in | Ground pin for the device (VSS_6). |
| 52 | VDD_6 | power_in | Digital supply pin (VDD_6); application supply and I/Os range 2.0 to 3.6 V. |
| 53 | PF13 | bidirectional | 5 V-tolerant (FT) I/O; default function PF13, alternate function FSMC_A7. |
| 54 | PF14 | bidirectional | 5 V-tolerant (FT) I/O; default function PF14, alternate function FSMC_A8. |
| 55 | PF15 | bidirectional | 5 V-tolerant (FT) I/O; default function PF15, alternate function FSMC_A9. |
| 56 | PG0 | bidirectional | 5 V-tolerant (FT) I/O; default function PG0, alternate function FSMC_A10. |
| 57 | PG1 | bidirectional | 5 V-tolerant (FT) I/O; default function PG1, alternate function FSMC_A11. |
| 58 | PE7 | bidirectional | 5 V-tolerant (FT) I/O; default function PE7, alternate function FSMC_D4, remap TIM1_ETR. |
| 59 | PE8 | bidirectional | 5 V-tolerant (FT) I/O; default function PE8, alternate function FSMC_D5, remap TIM1_CH1N. |
| 60 | PE9 | bidirectional | 5 V-tolerant (FT) I/O; default function PE9, alternate function FSMC_D6, remap TIM1_CH1. |
| 61 | VSS_7 | power_in | Ground pin for the device (VSS_7). |
| 62 | VDD_7 | power_in | Digital supply pin (VDD_7); application supply and I/Os range 2.0 to 3.6 V. |
| 63 | PE10 | bidirectional | 5 V-tolerant (FT) I/O; default function PE10, alternate function FSMC_D7, remap TIM1_CH2N. |
| 64 | PE11 | bidirectional | 5 V-tolerant (FT) I/O; default function PE11, alternate function FSMC_D8, remap TIM1_CH2. |
| 65 | PE12 | bidirectional | 5 V-tolerant (FT) I/O; default function PE12, alternate function FSMC_D9, remap TIM1_CH3N. |
| 66 | PE13 | bidirectional | 5 V-tolerant (FT) I/O; default function PE13, alternate function FSMC_D10, remap TIM1_CH3. |
| 67 | PE14 | bidirectional | 5 V-tolerant (FT) I/O; default function PE14, alternate function FSMC_D11, remap TIM1_CH4. |
| 68 | PE15 | bidirectional | 5 V-tolerant (FT) I/O; default function PE15, alternate function FSMC_D12, remap TIM1_BKIN. |
| 69 | PB10 | bidirectional | 5 V-tolerant (FT) I/O; default function PB10, alternate functions I2C2_SCL and USART3_TX, remap TIM2_CH3. |
| 70 | PB11 | bidirectional | 5 V-tolerant (FT) I/O; default function PB11, alternate functions I2C2_SDA and USART3_RX, remap TIM2_CH4. |
| 71 | VSS_1 | power_in | Ground pin for the device (VSS_1). |
| 72 | VDD_1 | power_in | Digital supply pin (VDD_1); application supply and I/Os range 2.0 to 3.6 V. |
| 73 | PB12 | bidirectional | 5 V-tolerant (FT) I/O; default function PB12, alternate functions SPI2_NSS, I2S2_WS, I2C2_SMBA, USART3_CK and TIM1_BKIN. |
| 74 | PB13 | bidirectional | 5 V-tolerant (FT) I/O; default function PB13, alternate functions SPI2_SCK, I2S2_CK, USART3_CTS and TIM1_CH1N. |
| 75 | PB14 | bidirectional | 5 V-tolerant (FT) I/O; default function PB14, alternate functions SPI2_MISO, TIM1_CH2N, USART3_RTS and TIM12_CH1. |
| 76 | PB15 | bidirectional | 5 V-tolerant (FT) I/O; default function PB15, alternate functions SPI2_MOSI, I2S2_SD, TIM1_CH3N and TIM12_CH2. |
| 77 | PD8 | bidirectional | 5 V-tolerant (FT) I/O; default function PD8, alternate function FSMC_D13, remap USART3_TX. |
| 78 | PD9 | bidirectional | 5 V-tolerant (FT) I/O; default function PD9, alternate function FSMC_D14, remap USART3_RX. |
| 79 | PD10 | bidirectional | 5 V-tolerant (FT) I/O; default function PD10, alternate function FSMC_D15, remap USART3_CK. |
| 80 | PD11 | bidirectional | 5 V-tolerant (FT) I/O; default function PD11, alternate function FSMC_A16, remap USART3_CTS. |
| 81 | PD12 | bidirectional | 5 V-tolerant (FT) I/O; default function PD12, alternate function FSMC_A17, remap TIM4_CH1 and USART3_RTS. |
| 82 | PD13 | bidirectional | 5 V-tolerant (FT) I/O; default function PD13, alternate function FSMC_A18, remap TIM4_CH2. |
| 83 | VSS_8 | power_in | Ground pin for the device (VSS_8). |
| 84 | VDD_8 | power_in | Digital supply pin (VDD_8); application supply and I/Os range 2.0 to 3.6 V. |
| 85 | PD14 | bidirectional | 5 V-tolerant (FT) I/O; default function PD14, alternate function FSMC_D0, remap TIM4_CH3. |
| 86 | PD15 | bidirectional | 5 V-tolerant (FT) I/O; default function PD15, alternate function FSMC_D1, remap TIM4_CH4. |
| 87 | PG2 | bidirectional | 5 V-tolerant (FT) I/O; default function PG2, alternate function FSMC_A12. |
| 88 | PG3 | bidirectional | 5 V-tolerant (FT) I/O; default function PG3, alternate function FSMC_A13. |
| 89 | PG4 | bidirectional | 5 V-tolerant (FT) I/O; default function PG4, alternate function FSMC_A14. |
| 90 | PG5 | bidirectional | 5 V-tolerant (FT) I/O; default function PG5, alternate function FSMC_A15. |
| 91 | PG6 | bidirectional | 5 V-tolerant (FT) I/O; default function PG6, alternate function FSMC_INT2. |
| 92 | PG7 | bidirectional | 5 V-tolerant (FT) I/O; default function PG7, alternate function FSMC_INT3. |
| 93 | PG8 | bidirectional | 5 V-tolerant (FT) I/O; default function PG8, no alternate function listed. |
| 94 | VSS_9 | power_in | Ground pin for the device (VSS_9). |
| 95 | VDD_9 | power_in | Digital supply pin (VDD_9); application supply and I/Os range 2.0 to 3.6 V. |
| 96 | PC6 | bidirectional | 5 V-tolerant (FT) I/O; default function PC6, alternate functions I2S2_MCK, TIM8_CH1 and SDIO_D6, remap TIM3_CH1. |
| 97 | PC7 | bidirectional | 5 V-tolerant (FT) I/O; default function PC7, alternate functions I2S3_MCK, TIM8_CH2 and SDIO_D7, remap TIM3_CH2. |
| 98 | PC8 | bidirectional | 5 V-tolerant (FT) I/O; default function PC8, alternate functions TIM8_CH3 and SDIO_D0, remap TIM3_CH3. |
| 99 | PC9 | bidirectional | 5 V-tolerant (FT) I/O; default function PC9, alternate functions TIM8_CH4 and SDIO_D1, remap TIM3_CH4. |
| 100 | PA8 | bidirectional | 5 V-tolerant (FT) I/O; default function PA8, alternate functions USART1_CK, TIM1_CH1 and MCO. |
| 101 | PA9 | bidirectional | 5 V-tolerant (FT) I/O; default function PA9, alternate functions USART1_TX and TIM1_CH2. |
| 102 | PA10 | bidirectional | 5 V-tolerant (FT) I/O; default function PA10, alternate functions USART1_RX and TIM1_CH3. |
| 103 | PA11 | bidirectional | 5 V-tolerant (FT) I/O; default function PA11, alternate functions USART1_CTS, USB_DM, CAN_RX and TIM1_CH4. |
| 104 | PA12 | bidirectional | 5 V-tolerant (FT) I/O; default function PA12, alternate functions USART1_RTS, USB_DP, CAN_TX and TIM1_ETR. |
| 105 | PA13 | bidirectional | 5 V-tolerant (FT) I/O; default function JTMS-SWDIO (serial wire debug data), main function PA13. |
| 106 | NC | unconnected | Not connected. |
| 107 | VSS_2 | power_in | Ground pin for the device (VSS_2). |
| 108 | VDD_2 | power_in | Digital supply pin (VDD_2); application supply and I/Os range 2.0 to 3.6 V. |
| 109 | PA14 | bidirectional | 5 V-tolerant (FT) I/O; default function JTCK-SWCLK (serial wire clock), main function PA14. |
| 110 | PA15 | bidirectional | 5 V-tolerant (FT) I/O; default function JTDI, alternate functions SPI3_NSS, I2S3_WS and TIM2_CH1_ETR, remap PA15 and SPI1_NSS. |
| 111 | PC10 | bidirectional | 5 V-tolerant (FT) I/O; default function PC10, alternate functions UART4_TX and SDIO_D2, remap USART3_TX. |
| 112 | PC11 | bidirectional | 5 V-tolerant (FT) I/O; default function PC11, alternate functions UART4_RX and SDIO_D3, remap USART3_RX. |
| 113 | PC12 | bidirectional | 5 V-tolerant (FT) I/O; default function PC12, alternate functions UART5_TX and SDIO_CK, remap USART3_CK. |
| 114 | PD0 | bidirectional | 5 V-tolerant (FT) I/O; default function PD0, alternate functions FSMC_D2 and CAN_RX; available by default on this package. |
| 115 | PD1 | bidirectional | 5 V-tolerant (FT) I/O; default function PD1, alternate functions FSMC_D3 and CAN_TX; available by default on this package. |
| 116 | PD2 | bidirectional | 5 V-tolerant (FT) I/O; default function PD2, alternate functions TIM3_ETR, UART5_RX and SDIO_CMD. |
| 117 | PD3 | bidirectional | 5 V-tolerant (FT) I/O; default function PD3, alternate functions FSMC_CLK and USART2_CTS. |
| 118 | PD4 | bidirectional | 5 V-tolerant (FT) I/O; default function PD4, alternate functions FSMC_NOE and USART2_RTS. |
| 119 | PD5 | bidirectional | 5 V-tolerant (FT) I/O; default function PD5, alternate functions FSMC_NWE and USART2_TX. |
| 120 | VSS_10 | power_in | Ground pin for the device (VSS_10). |
| 121 | VDD_10 | power_in | Digital supply pin (VDD_10); application supply and I/Os range 2.0 to 3.6 V. |
| 122 | PD6 | bidirectional | 5 V-tolerant (FT) I/O; default function PD6, alternate functions FSMC_NWAIT and USART2_RX. |
| 123 | PD7 | bidirectional | 5 V-tolerant (FT) I/O; default function PD7, alternate functions FSMC_NE1/FSMC_NCE2 and USART2_CK. |
| 124 | PG9 | bidirectional | 5 V-tolerant (FT) I/O; default function PG9, alternate functions FSMC_NE2/FSMC_NCE3. |
| 125 | PG10 | bidirectional | 5 V-tolerant (FT) I/O; default function PG10, alternate functions FSMC_NCE4_1/FSMC_NE3. |
| 126 | PG11 | bidirectional | 5 V-tolerant (FT) I/O; default function PG11, alternate function FSMC_NCE4_2. |
| 127 | PG12 | bidirectional | 5 V-tolerant (FT) I/O; default function PG12, alternate function FSMC_NE4. |
| 128 | PG13 | bidirectional | 5 V-tolerant (FT) I/O; default function PG13, alternate function FSMC_A24. |
| 129 | PG14 | bidirectional | 5 V-tolerant (FT) I/O; default function PG14, alternate function FSMC_A25. |
| 130 | VSS_11 | power_in | Ground pin for the device (VSS_11). |
| 131 | VDD_11 | power_in | Digital supply pin (VDD_11); application supply and I/Os range 2.0 to 3.6 V. |
| 132 | PG15 | bidirectional | 5 V-tolerant (FT) I/O; default function PG15, no alternate function listed. |
| 133 | PB3 | bidirectional | 5 V-tolerant (FT) I/O; default function JTDO, alternate functions SPI3_SCK, I2S3_CK, PB3/TRACESWO, TIM2_CH2 and SPI1_SCK. |
| 134 | PB4 | bidirectional | 5 V-tolerant (FT) I/O; default function NJTRST, alternate functions SPI3_MISO, PB4, TIM3_CH1 and SPI1_MISO. |
| 135 | PB5 | bidirectional | I/O (no FT); default function PB5, alternate functions I2C1_SMBA, SPI3_MOSI and I2S3_SD, with TIM3_CH2 and SPI1_MOSI listed as remap. |
| 136 | PB6 | bidirectional | 5 V-tolerant (FT) I/O; default function PB6, alternate functions I2C1_SCL and TIM4_CH1, remap USART1_TX. |
| 137 | PB7 | bidirectional | 5 V-tolerant (FT) I/O; default function PB7, alternate functions I2C1_SDA, FSMC_NADV and TIM4_CH2, remap USART1_RX. |
| 138 | BOOT0 | input | Boot mode selection input BOOT0, typed as input (I) in Table 5. |
| 139 | PB8 | bidirectional | 5 V-tolerant (FT) I/O; default function PB8, alternate functions TIM4_CH3, SDIO_D4 and TIM10_CH1, remap I2C1_SCL and CAN_RX. |
| 140 | PB9 | bidirectional | 5 V-tolerant (FT) I/O; default function PB9, alternate functions TIM4_CH4, SDIO_D5 and TIM11_CH1, remap I2C1_SDA and CAN_TX. |
| 141 | PE0 | bidirectional | 5 V-tolerant (FT) I/O; default function PE0, alternate functions TIM4_ETR and FSMC_NBL0. |
| 142 | PE1 | bidirectional | 5 V-tolerant (FT) I/O; default function PE1, alternate function FSMC_NBL1. |
| 143 | VSS_3 | power_in | Ground pin for the device (VSS_3). |
| 144 | VDD_3 | power_in | Digital supply pin (VDD_3); application supply and I/Os range 2.0 to 3.6 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | LQFP-144(20x20) |
| Category | Embedded Processors & Controllers |
| Pins | 144 |
CAD (KiCad official)
- Symbol:
STM32F103ZFT6 - Footprint:
Package_QFP:LQFP-144_20x20mm_P0.5mm - 3D model: LQFP-144(20x20) (KiCad packages3D, STEP)
- 3D model files:
stm32f103zft6-etched.step/stm32f103zft6-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);stm32f103zft6.step/stm32f103zft6.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (136 pp, sha256
69897f9cf77df3f0, retrieved 2026-10-08, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).