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Contents

README

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LTC7004EMSE#PBF

Analog Devices · Gate Drive ICs · MSOP-10-EP

LTC7004EMSE#PBF from Analog Devices, in a MSOP-10-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VCC power_in Main supply pin; a bypass capacitor with a minimum value of 0.1µF should be tied between this pin and GND.
2 VCCUV input VCC undervoltage lockout set pin; a voltage of 0.5V to 1.5V on this pin is multiplied by seven to set the gate drive UVLO, shorting it to ground sets 3.5V and leaving it open sets 7.0V.
3 GND power_in Ground; the exposed pad must be soldered to the PCB for rated electrical and thermal performance.
4 INP input CMOS-compatible input referenced to GND that sets the state of TGDN and TGUP, with an internal 1MΩ pull-down to GND.
5 OVLO input Overvoltage lockout input; a voltage above 1.21V pulls TGDN to TS, normal operation resumes below 1.11V, and the pin should be tied to GND when not used.
6 TGDN output High current gate driver pull-down that pulls down to TS; tie directly to the external high side MOSFET gate for the fastest turn-off.
7 TGUP output High current gate driver pull-up that pulls up to BST; tie to TGDN for maximum transition speed, or use a series resistor to control turn-on inrush current.
8 TS power_in Top (high side) source connection, or GND if used in ground referenced applications.
9 BST power_in High side bootstrapped supply; an external capacitor with a minimum value of 0.1µF should be tied between this pin and TS, with voltage swing from 12V to (VTS + 12V).
10 NC unconnected No connect; this pin should be left floating.
11 GND power_in Exposed pad is GND and must be soldered to the PCB for rated electrical and thermal performance.

Key specifications

Parameter Value
Manufacturer Analog Devices
Package MSOP-10-EP
Category Power Management ICs
Pins 11

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
TS Operating Voltage Range 0 60 V 3
Total Supply Current 225 µA ON or Sleep, Charge Pump Regulating, VBST = OPEN, VTS = 12V 3
VCC Supply Current, Charge Pump Overdriven, ON Mode 27 50 µA VBST-TS = 13V, VINP = 4V 3
VCC Supply Current, Charge Pump Overdriven, Sleep Mode 27 50 µA VBST-TS = 13V, VINP = 0.4V 3
VCC Undervoltage Lockout, VCC Rising 6.5 7 7.5 V VCCUV = OPEN 3
VCC Undervoltage Lockout, VCC Falling 5.8 6.4 6.9 V VCCUV = OPEN 3
VCC Undervoltage Lockout, VCC Rising 3.1 3.5 3.7 V VCCUV = 0V 3
VCC Undervoltage Lockout, VCC Falling 2.8 3.2 3.4 V VCCUV = 0V 3
VCC Undervoltage Lockout, VCC Rising 9.7 10.5 10.9 V VCCUV = 1.5V 3
VCC Undervoltage Lockout, VCC Falling 9.1 9.9 10.3 V VCCUV = 1.5V 3
VBST-TS (VTG above VTS, INP = 3V) VBST-TS 9 10 10 V VCC = VTS = 7V, IBST = 0µA 3
VBST-TS (VTG above VTS, INP = 3V) VBST-TS 11 12 12 V VCC = VTS = 10V, IBST = 0µA 3
VBST-TS (VTG above VTS, INP = 3V) VBST-TS 14 14 14 V VTS = 60V, IBST = 0µA 3
Charge Pump Output Current -15 -30 µA VTS = 20V, VBST-TS = 10V 3
TG Pull-Up Resistance 2.2 7 Ω VCC = VBST = 12V 3
TG Pull-Down Resistance 1 4 Ω VCC = VBST = 12V 3
Input to Output Propagation Delay, VINP Rising tPLH 35 70 ns VINP Rising, CL = 1nF 3
Input to Output Propagation Delay, VINP Falling tPHL 35 70 ns VINP Falling, CL = 1nF 3
Input Threshold Voltage, VINP Rising VIH 1.7 2 2.2 V VINP Rising 3
Input Threshold Voltage, VINP Falling VIL 1.3 1.6 1.8 V VINP Falling 3
Input Pull-Down Resistance 1 MΩ VINP = 1V 3
OVLO Pin Threshold Voltage, Rising 1.16 1.21 1.26 V Rising 3
OVLO Pin Threshold Voltage, Falling 1.05 1.1 1.15 V Falling 3
OVLO Pin Leakage Current -100 0 100 nA VOVLO = 1.3V 3
VCCUV Pull-Up Current VVCCUV -11.3 -10 8.7 µA VVCCUV = 1V 3
TS Voltage TS -6 65 V 2
BST-TS Voltage BST-TS -0.3 15 V 2
VCC Voltage VCC -0.3 15 V 2
BST Voltage BST -0.3 80 V 2
INP Voltage INP -6 15 V 2
VCCUV Voltage VCCUV -0.3 6 V 2
OVLO Voltage OVLO -0.3 6 V 2
Operating Junction Temperature Range TJ -40 125 °C LTC7004E 2
Storage Temperature Range TSTG -65 150 °C 2
Lead Temperature (Soldering, 10 sec), MSOP Package 300 °C 10 sec soldering 2
Maximum Junction Temperature TJMAX 150 °C 2
Junction-to-Ambient Thermal Resistance θJA 45 °C/W 2
Junction-to-Case Thermal Resistance θJC 10 °C/W 2

CAD (KiCad official)

  • Symbol: LTC7004EMSE#PBF
  • Footprint: Package_SO:MSOP-10-1EP_3x3mm_P0.5mm_EP1.68x1.88mm
  • 3D model: MSOP-10-EP (KiCad packages3D, STEP)
  • 3D model files: ltc7004emse-pbf-etched.step / ltc7004emse-pbf-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ltc7004emse-pbf.step / ltc7004emse-pbf.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (18 pp, sha256 e91bace7fe2963e2, retrieved 2026-10-30, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF