component
SN65MLVD207DR
Public Made by Adomby adom
Texas Instruments LVDS ICs, SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads on click. Unloads only if this page sits in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads on click. Unloads only if this page sits in the background.
PCB Footprint
Open full view ↗Loads on click. Unloads only if this page sits in the background.
Datasheet
Open in new tab ↗Loads on click. Unloads only if this page sits in the background.
README
markdownSN65MLVD207DR
Texas Instruments · LVDS ICs · SOIC-14
SN65MLVD207DR from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | NC | unconnected | No internal connection. |
| 2 | R | tri_state | Receiver output, high impedance when receiver is disabled (RE high or open); output range -0.3 V to 4 V. |
| 3 | RE | input | Receiver enable, active low; input range -0.5 V to 4 V, VIH 2 V min, VIL 0.8 V max. |
| 4 | DE | input | Driver enable, active high; driver outputs are high impedance when DE is low or open; VIH 2 V min, VIL 0.8 V max. |
| 5 | D | input | Driver data input; input range -0.5 V to 4 V, VIH 2 V min, VIL 0.8 V max. |
| 6 | GND | power_in | Ground. |
| 7 | GND | power_in | Ground. |
| 8 | NC | unconnected | No internal connection. |
| 9 | Y | tri_state | Non-inverting M-LVDS driver output, high impedance when disabled; bus voltage range -1.4 V to 3.8 V recommended. |
| 10 | Z | tri_state | Inverting M-LVDS driver output, high impedance when disabled; bus voltage range -1.4 V to 3.8 V recommended. |
| 11 | B | input | Inverting M-LVDS receiver input; absolute maximum -4 V to 6 V (203/207), recommended bus range -1.4 V to 3.8 V. |
| 12 | A | input | Non-inverting M-LVDS receiver input; absolute maximum -4 V to 6 V (203/207), recommended bus range -1.4 V to 3.8 V. |
| 13 | VCC | power_in | Supply voltage, 3 V to 3.6 V recommended (3.3 V nominal). |
| 14 | VCC | power_in | Supply voltage, 3 V to 3.6 V recommended (3.3 V nominal). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-14 |
| Category | Interface |
| Pins | 14 |
CAD (KiCad official)
- Symbol:
SN65MLVD207DR - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOIC-14 (KiCad packages3D, STEP)
- 3D model files:
sn65mlvd207dr-etched.step/sn65mlvd207dr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn65mlvd207dr.step/sn65mlvd207dr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (31 pp, sha256
5073de1b180d3c83, retrieved 2026-10-03, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).