component
FAN6300HMY
Public Made by Adomby adom
onsemi AC-DC Controllers And Regulators, SOIC-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownFAN6300HMY
onsemi · AC-DC Controllers And Regulators · SOIC-8
FAN6300HMY from onsemi, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | DET | input | Detection input tied through a divider to an auxiliary transformer winding. Generates the zero-current-detect (ZCD) valley-switching signal, provides a line-compensation offset for constant power limiting, and forms the output OVP comparator against an internal 2.5 V reference (latched shutdown). |
| 2 | FB | input | Feedback input from the secondary-side error amplifier / optocoupler collector. Input impedance ~5 kΩ equivalent with a 1/3 attenuator to the PWM comparator. If FB voltage exceeds ~4.2 V for more than 55 ms, open-loop protection latches off. |
| 3 | CS | input | Current-sense comparator input. Connect to a sense resistor at the source of the external power MOSFET; the resulting voltage drives cycle-by-cycle peak-current limiting and leading-edge blanking is applied internally. |
| 4 | GND | power_in | Power ground and signal ground. A 0.1 µF decoupling capacitor is recommended between VDD and GND close to the IC. |
| 5 | GATE | output | Totem-pole PWM gate-drive output for the external power MOSFET. Output voltage is clamped internally to 18 V to protect the MOSFET gate-source oxide. |
| 6 | VDD | power_in | Controller supply pin. Two-step UVLO with turn-on threshold ~16 V and turn-off ~10 V. Startup current below 20 µA and operating current below 4.5 mA. |
| 7 | NC | unconnected | No internal connection. Leave floating or tie to a copper island for isolation between HV and VDD. |
| 8 | HV | power_in | High-voltage startup input. Connects to the rectified bulk DC line to supply the internal HV startup current source that charges the VDD capacitor. Disabled once VDD exceeds the turn-on threshold to minimize standby power. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | SOIC-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
Ordering variants
Same part, different packaging or reel option.
FAN6300HMYFAN6300AMY
CAD (KiCad official)
- Symbol:
FAN6300HMY - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
fan6300hmy-etched.step/fan6300hmy-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);fan6300hmy.step/fan6300hmy.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: onsemi datasheet (15 pp, sha256
01751df7738d4285, retrieved 2026-08-17, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).