EG3013S from EG Micro, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	Vcc	power_in	Chip supply input. Recommended operating range 4.5V-15V (absolute max 35V). Bypass with a 0.1uF high-frequency ceramic close to the pin to suppress input high-frequency noise. Also supplies the internal logic and level-shift circuitry.
2	HIN	input	Active-high logic input controlling the high-side power MOSFET (drives HO). Internally pulled to GND via 15K resistor so the output defaults off when the input floats. Vih >= 2.5V, Vil <= 1.0V, Iin(H) ~300uA @ 5V. Absolute max 35V.
3	/LIN	input	Active-low logic input controlling the low-side power MOSFET (drives LO). Internally pulled up to Vcc (5V) via 15K resistor so the low-side output defaults off when the input floats. Vih >= 2.5V, Vil <= 1.0V. Absolute max 35V.
4	GND	power_in	Chip ground reference. Internal logic ground and analog ground are tied together to this pin.
5	LO	output	Low-side gate-drive output. Totem-pole Darlington output referenced to GND, driving the low-side N-channel MOSFET/IGBT gate. Source ~0.8A / sink ~1A peak (PW <= 10us). Absolute max 35V.
6	VS	power_in	High-side floating return (source of external high-side MOSFET). Sets the reference for the bootstrapped high-side driver; the bootstrap capacitor connects between VB and VS. Absolute max 80V (min -0.7V).
7	HO	output	High-side gate-drive output. Totem-pole Darlington output referenced to VS, driving the high-side N-channel MOSFET/IGBT gate. Source ~0.8A / sink ~1A peak (PW <= 10us). Absolute max 90V.
8	VB	power_in	High-side floating bootstrap supply. Bootstrap capacitor connects between VB and VS; may be charged through an internal or external (e.g. FR107) bootstrap diode from Vcc. Absolute max 90V; supports high-side rails up to 80V.

Key specifications

Parameter	Value
Manufacturer	EG Micro
Package	SOP-8
Category	PMIC
Pins	8

CAD (KiCad official)

Symbol: EG3013S
Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
3D model: SOP-8 (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`eg3013s.step`	122 KB	You want the bare part, or you mark your own boards.
`eg3013s-etched.step`	1.9 MB	You want the part with `EG3013S` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 466 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: EG Micro datasheet (13 pp, sha256 1be493a6c5527a8d, retrieved 2026-08-17, tier: lcsc)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF