TF2101M-TR
Public Made by Adomby adom
JSMSEMI Isolators - Gate Drivers, SOP-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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README
markdownTF2101M-TR
JSMSEMI · Isolators - Gate Drivers · SOP-8
TF2101M-TR from JSMSEMI, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCC | power_in | Low-side supply voltage. Recommended operating range 10V to 20V (absolute max 25V). UVLO thresholds: rising 8.9V typ, falling 8.2V typ. |
| 2 | HIN | input | High-side logic input. CMOS/LSTTL compatible (VIH ≥ 2.5V, VIL ≤ 0.8V) accepting 3.3V/5V/15V logic levels. Controls the HO output. |
| 3 | LIN | input | Low-side logic input. CMOS/LSTTL compatible (VIH ≥ 2.5V, VIL ≤ 0.8V) accepting 3.3V/5V/15V logic levels. Controls the LO output. |
| 4 | VSS | power_in | Logic and low-side ground reference for the IC. All input logic and VCC voltages are referenced to this pin. |
| 5 | LO | output | Low-side gate drive output. Referenced to VSS; drives the gate of the low-side power MOSFET/IGBT. Source/sink capability 300mA/600mA. |
| 6 | VS | power_in | High-side floating ground return. Connects to the source of the high-side MOSFET / emitter of high-side IGBT. Recommended range -9V to +700V (transient VSS-50V for 50ns pulses). |
| 7 | HO | output | High-side floating gate drive output. Referenced to VS; drives the gate of the high-side power MOSFET/IGBT. Swings between VS and VB. |
| 8 | VB | power_in | High-side floating supply (bootstrap). Recommended VS+10V to VS+20V; absolute max 725V. Typically supplied via a bootstrap diode and capacitor from VCC. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | JSMSEMI |
| Package | SOP-8 |
| Category | PMIC |
| Pins | 8 |
Ordering variants
Same part, different packaging or reel option.
TF2101M-TR
CAD (KiCad official)
- Symbol:
TF2101M-TR - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files:
tf2101m-tr-etched.step/tf2101m-tr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tf2101m-tr.step/tf2101m-tr.glbare the bare package body.
3D model downloads
Two STEP files. Same geometry, different body top:
| File | Size | Use it when |
|---|---|---|
tf2101m-tr.step |
122 KB | You want the bare part, or you mark your own boards. |
tf2101m-tr-etched.step |
1.6 MB | You want the part with TF2101M-TR already on it. |
The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 432 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: JSMSEMI datasheet (7 pp, sha256
2348c0cbb5ad890e, retrieved 2026-08-17, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).