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MS90C031
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Hangzhou Ruimeng Tech LVDS ICs, SOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownMS90C031
Hangzhou Ruimeng Tech · LVDS ICs · SOP-16
MS90C031 from Hangzhou Ruimeng Tech, in a SOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | DIN | input | CMOS/TTL signal input; the datasheet gives VIH of 2.0 V minimum and VIL of 0.8 V maximum at VCC=5.0 V. |
| 2 | DOUT+ | output | Non-inverting LVDS output of the differential pair, specified at ±350 mV differential swing into a 100 Ω load. |
| 3 | DOUT- | output | Inverting LVDS output of the differential pair, specified at ±350 mV differential swing into a 100 Ω load. |
| 4 | EN | input | Active-high enable input; the driver outputs go high-impedance when EN is low and EN* is high. |
| 5 | DOUT- | output | Inverting LVDS output of the differential pair, specified at ±350 mV differential swing into a 100 Ω load. |
| 6 | DOUT+ | output | Non-inverting LVDS output of the differential pair, specified at ±350 mV differential swing into a 100 Ω load. |
| 7 | DIN | input | CMOS/TTL signal input; the datasheet gives VIH of 2.0 V minimum and VIL of 0.8 V maximum at VCC=5.0 V. |
| 8 | GND | power_in | Ground reference for the device. |
| 9 | DIN | input | CMOS/TTL signal input; the datasheet gives VIH of 2.0 V minimum and VIL of 0.8 V maximum at VCC=5.0 V. |
| 10 | DOUT+ | output | Non-inverting LVDS output of the differential pair, specified at ±350 mV differential swing into a 100 Ω load. |
| 11 | DOUT- | output | Inverting LVDS output of the differential pair, specified at ±350 mV differential swing into a 100 Ω load. |
| 12 | EN* | input | Active-low enable input, paired with EN; the driver outputs go high-impedance when EN is low and EN* is high. |
| 13 | DOUT- | output | Inverting LVDS output of the differential pair, specified at ±350 mV differential swing into a 100 Ω load. |
| 14 | DOUT+ | output | Non-inverting LVDS output of the differential pair, specified at ±350 mV differential swing into a 100 Ω load. |
| 15 | DIN | input | CMOS/TTL signal input; the datasheet gives VIH of 2.0 V minimum and VIL of 0.8 V maximum at VCC=5.0 V. |
| 16 | VCC | power_in | Power supply pin, +5 V ±10%; the recommended supply range is 2.5 V to 5.5 V with an absolute maximum of 6 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Hangzhou Ruimeng Tech |
| Package | SOP-16 |
| Category | Interface ICs |
| Pins | 16 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage range | VCC | -0.3 | 6 | V | 4 | ||
| Input voltage range (Din) | Din | -0.3 | V | max printed as VCC+0.3 | 4 | ||
| Input voltage range (EN, EN*) | EN, EN* | -0.3 | V | max printed as VCC+0.3 | 4 | ||
| Output voltage range (Dout+, Dout-) | Dout+, Dout- | -0.3 | V | max printed as VCC+0.3 | 4 | ||
| Maximum junction temperature | Tj | 150 | °C | 4 | |||
| Storage temperature range | Tstg | -60 | 150 | °C | 4 | ||
| ESD voltage (HBM) | 3500 | V | 1.5 kΩ, 100 pF | 4 | |||
| ESD voltage (EIAJ) | 250 | V | 0 Ω, 200 pF | 4 | |||
| Supply voltage range (recommended) | VCC | 2.5 | 5 | 5.5 | V | 4 | |
| Operating temperature | -40 | 25 | 125 | °C | 4 | ||
| Differential output voltage | Vod1 | 320 | 398 | 450 | mV | RL=100Ω (图 1), VCC=5.0V | 5 |
| Differential output voltage | Vod1 | 300 | 380 | 420 | mV | RL=100Ω (图 1), VCC=3.3V | 5 |
| Differential output voltage imbalance | ΔVod1 | 4 | 35 | mV | RL=100Ω (图 1), VCC=5.0V | 5 | |
| Common-mode output voltage | Vos | 1.16 | 1.43 | 1.53 | V | RL=100Ω (图 1), VCC=5.0V | 5 |
| Common-mode output voltage | Vos | 1.13 | 1.39 | 1.4 | V | RL=100Ω (图 1), VCC=3.3V | 5 |
| Common-mode output voltage imbalance | ΔVos | 5 | 25 | mV | RL=100Ω (图 1), VCC=5.0V | 5 | |
| Output high voltage | VOH | 1.58 | 1.75 | V | RL=100Ω, VCC=5.0V | 5 | |
| Output high voltage | VOH | 1.55 | 1.62 | V | RL=100Ω, VCC=3.3V | 5 | |
| Output low voltage | VOL | 0.98 | 1.2 | V | RL=100Ω, VCC=5.0V | 5 | |
| Output low voltage | VOL | 0.95 | 1.18 | V | RL=100Ω, VCC=3.3V | 5 | |
| Input high voltage | VIH | 2 | V | Din, EN, EN*, VCC=5.0V; max printed as VCC | 5 | ||
| Input high voltage | VIH | 1.5 | V | Din, EN, EN*, VCC=3.3V; max printed as VCC | 5 | ||
| Input low voltage | VIL | 0.8 | V | VCC=5.0V; min printed as GND | 5 | ||
| Input low voltage | VIL | 0.7 | V | VCC=3.3V; min printed as GND | 5 | ||
| Input current | II | -10 | 10 | uA | VCC=5.0V, Vin=VCC, GND, 2.5V 或 0.4V | 5 | |
| Input clamp voltage | VCL | -1.5 | -0.8 | V | ICL=-18mA, VCC=5.0V | 5 | |
| Output short-circuit current | IOS | -6 | -4.5 | mA | Vout=0V (注 4), VCC=5.0V | 5 | |
| Output short-circuit current | IOS | -5 | -4 | mA | Vout=0V (注 4), VCC=3.3V | 5 | |
| Output three-state current | IOZ | -10 | 10 | uA | VCC=5.0V, EN=0.8V, EN*=2.0V, Vout=0 或 VCC | 5 | |
| Supply current, driver enabled, no load | ICC | 1.9 | 4 | mA | VCC=5.0V, Din=VCC 或 GND | 6 | |
| Supply current, driver enabled, no load | ICC | 1.7 | 3 | mA | VCC=3.3V, Din=VCC 或 GND | 6 | |
| Supply current, driver enabled, no load | ICC | 4 | 6.5 | mA | VCC=5.0V, Din=2.5V 或 0.4V | 6 | |
| Supply current, driver enabled, no load | ICC | 3.3 | 6 | mA | VCC=3.3V, Din=2.5V 或 0.4V | 6 | |
| Supply current, driver enabled, loaded | ICCL | 16.8 | 21 | mA | VCC=5.0V, RL=100Ω, Vin=VCC 或 GND | 6 | |
| Supply current, driver enabled, loaded | ICCL | 18 | 22 | mA | VCC=3.3V, RL=100Ω, Vin=VCC 或 GND | 6 | |
| Differential propagation delay (high to low) | tPHLD | 1 | 2 | 3 | ns | VCC=+5.0V, TA=+25°C; RL=100Ω, CL=5PF, 图 2 和图 3 | 6 |
| Differential propagation delay (low to high) | tPLHD | 1 | 2 | 3 | ns | VCC=+5.0V, TA=+25°C; RL=100Ω, CL=5PF, 图 2 和图 3 | 6 |
| Differential propagation delay skew | tSDK | 0 | 80 | 400 | ps | VCC=+5.0V, TA=+25°C; RL=100Ω, CL=5PF, 图 2 和图 3 | 6 |
| Channel-to-channel skew | tSK1 | 0 | 300 | 600 | ps | VCC=+5.0V, TA=+25°C; RL=100Ω, CL=5PF, 图 2 和图 3 | 6 |
| Rise time | tTLH | 0.35 | 1.5 | ns | VCC=+5.0V, TA=+25°C; RL=100Ω, CL=5PF, 图 2 和图 3 | 6 | |
| Fall time | tRHLD | 0.35 | 1.5 | ns | VCC=+5.0V, TA=+25°C; RL=100Ω, CL=5PF, 图 2 和图 3 | 6 | |
| Output high to high-Z delay | tPHZ | 2.5 | 10 | ns | VCC=+5.0V, TA=+25°C; RL=100Ω, CL=5PF, 图 4 和图 5 | 6 | |
| Output low to high-Z delay | tPLZ | 2.5 | 10 | ns | VCC=+5.0V, TA=+25°C; RL=100Ω, CL=5PF, 图 4 和图 5 | 6 | |
| Output high-Z to high delay | tPZH | 2.5 | 10 | ns | VCC=+5.0V, TA=+25°C; RL=100Ω, CL=5PF, 图 4 和图 5 | 6 | |
| Output high-Z to low delay | tPZL | 2.5 | 10 | ns | VCC=+5.0V, TA=+25°C; RL=100Ω, CL=5PF, 图 4 和图 5 | 6 | |
| Differential propagation delay (high to low) | tPHLD | 1 | 2 | 3.5 | ns | VCC=+5.0V±10%, TA=-40 至+85°C; RL=100Ω, CL=5PF, 图 2 和图 3 | 7 |
| Differential propagation delay (low to high) | tPLHD | 1 | 2 | 3.5 | ns | VCC=+5.0V±10%, TA=-40 至+85°C; RL=100Ω, CL=5PF, 图 2 和图 3 | 7 |
| Differential propagation delay skew | tSDK | 0 | 80 | 900 | ps | VCC=+5.0V±10%, TA=-40 至+85°C; RL=100Ω, CL=5PF, 图 2 和图 3 | 7 |
| Channel-to-channel skew | tSK1 | 0 | 300 | 1000 | ps | VCC=+5.0V±10%, TA=-40 至+85°C; RL=100Ω, CL=5PF, 图 2 和图 3 | 7 |
| Rise time | tTLH | 0.35 | 2 | ns | VCC=+5.0V±10%, TA=-40 至+85°C; RL=100Ω, CL=5PF, 图 2 和图 3 | 7 | |
| Fall time | tRHLD | 0.35 | 2 | ns | VCC=+5.0V±10%, TA=-40 至+85°C; RL=100Ω, CL=5PF, 图 2 和图 3 | 7 | |
| Output high to high-Z delay | tPHZ | 2.5 | 15 | ns | VCC=+5.0V±10%, TA=-40 至+85°C; RL=100Ω, CL=5PF, 图 4 和图 5 | 7 | |
| Output low to high-Z delay | tPLZ | 2.5 | 15 | ns | VCC=+5.0V±10%, TA=-40 至+85°C; RL=100Ω, CL=5PF, 图 4 和图 5 | 7 | |
| Output high-Z to high delay | tPZH | 2.5 | 15 | ns | VCC=+5.0V±10%, TA=-40 至+85°C; RL=100Ω, CL=5PF, 图 4 和图 5 | 7 | |
| Output high-Z to low delay | tPZL | 2.5 | 15 | ns | VCC=+5.0V±10%, TA=-40 至+85°C; RL=100Ω, CL=5PF, 图 4 和图 5 | 7 |
CAD (KiCad official)
- Symbol:
MS90C031 - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SOP-16 (KiCad packages3D, STEP)
- 3D model files:
ms90c031-etched.step/ms90c031-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ms90c031.step/ms90c031.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Hangzhou Ruimeng Tech datasheet (17 pp, sha256
0744467428c9301e, retrieved 2026-10-26, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusoff(skipped (clean text read)), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).