SN75161BN from Texas Instruments, in a PDIP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	TE	input	Talk enable control input that sets the transmit/receive direction of the DAV, NDAC and NRFD data-transfer channels (and EOI together with DC); VIH min 2 V, VIL max 0.8 V.
2	REN	bidirectional	Terminal-side I/O port of the Remote Enable bus-management channel (pairs with bus pin 19), with 3-state output rated IOH -800 µA and IOL 16 mA.
3	IFC	bidirectional	Terminal-side I/O port of the Interface Clear bus-management channel (pairs with bus pin 18), with 3-state output rated IOH -800 µA and IOL 16 mA.
4	NDAC	bidirectional	Terminal-side I/O port of the Not Data Accepted data-transfer channel (pairs with bus pin 17), with output rated IOH -800 µA and IOL 16 mA.
5	NRFD	bidirectional	Terminal-side I/O port of the Not Ready For Data data-transfer channel (pairs with bus pin 16), with output rated IOH -800 µA and IOL 16 mA.
6	DAV	bidirectional	Terminal-side I/O port of the Data Valid data-transfer channel (pairs with bus pin 15), with 3-state output rated IOH -800 µA and IOL 16 mA.
7	EOI	bidirectional	Terminal-side I/O port of the End Or Identify channel (pairs with bus pin 14), whose direction follows DC and TE, with output rated IOH -800 µA and IOL 16 mA.
8	ATN	bidirectional	Terminal-side I/O port of the Attention channel (pairs with bus pin 13), which also acts as the internal direction control for EOI when DC and TE are in the same state.
9	SRQ	bidirectional	Terminal-side I/O port of the Service Request bus-management channel (pairs with bus pin 12), with output rated IOH -800 µA and IOL 16 mA.
10	GND	power_in	Ground reference for the device; all voltage values are with respect to this network ground terminal.
11	DC	input	Direction control input that sets the transmit/receive direction of the ATN, SRQ, REN and IFC channels (and EOI together with TE); VIH min 2 V, VIL max 0.8 V.
12	SRQ	bidirectional	GPIB bus-side I/O port of the Service Request channel with active bus-terminating resistors, driver sinks up to 48 mA and sources IOH -5.2 mA (3-state).
13	ATN	bidirectional	GPIB bus-side I/O port of the Attention channel with active bus-terminating resistors, driver sinks up to 48 mA and sources IOH -5.2 mA.
14	EOI	bidirectional	GPIB bus-side I/O port of the End Or Identify channel with active bus-terminating resistors, driver sinks up to 48 mA and sources IOH -5.2 mA.
15	DAV	bidirectional	GPIB bus-side I/O port of the Data Valid channel with active bus-terminating resistors, driver sinks up to 48 mA and sources IOH -5.2 mA.
16	NRFD	bidirectional	GPIB bus-side I/O port of the Not Ready For Data channel with passive pull-up output and bus-terminating resistors, driver sinks up to 48 mA.
17	NDAC	bidirectional	GPIB bus-side I/O port of the Not Data Accepted channel with passive pull-up output and bus-terminating resistors, driver sinks up to 48 mA.
18	IFC	bidirectional	GPIB bus-side I/O port of the Interface Clear channel with active bus-terminating resistors, driver sinks up to 48 mA and sources IOH -5.2 mA.
19	REN	bidirectional	GPIB bus-side I/O port of the Remote Enable channel with active bus-terminating resistors, driver sinks up to 48 mA and sources IOH -5.2 mA.
20	VCC	power_in	Supply voltage input, recommended 4.75 V to 5.25 V (5 V nominal), absolute maximum 7 V.

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	PDIP-20
Category	Interface ICs
Pins	20

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Supply voltage	VCC	4.75	5	5.25	V		6
High-level input voltage	VIH	2			V		6
Low-level input voltage	VIL			0.8	V		6
High-level output current, bus ports with 3-state outputs	IOH			-5.2	mA	Bus ports with 3-state outputs	6
High-level output current, terminal ports	IOH			-800	µA	Terminal ports	6
Low-level output current, bus ports	IOL			48	mA	Bus ports	6
Low-level output current, terminal ports	IOL			16	mA	Terminal ports	6
Operating free-air temperature	TA	0		70	°C		6
Supply voltage	VCC			7	V		5
Input voltage	VI			5.5	V		5
Low-level driver output current	IOL			100	mA		5
Storage temperature range	Tstg	-65		150	°C		5
Lead temperature				260	°C	1,6 mm (1/16) inch from the case for 10 seconds	5
Continuous total power dissipation, N (20 pin), TA ≤ 25°C				1150	mW	N (20 pin), TA ≤ 25°C	6
Derating factor above TA = 25°C, N (20 pin)			9.2		mW/°C	N (20 pin), above TA = 25°C	6
Power rating at TA = 70°C, N (20 pin)			736		mW	N (20 pin), TA = 70°C	6
Input clamp voltage	VIK		-0.8	-1.5	V	II = -18 mA	7
Hysteresis voltage (VIT+ - VIT-)	Vhys	0.4	0.65		V	Bus, see Figure 7	7
High-level output voltage, terminal	VOH	2.7	3.5		V	Terminal IOH = -800 µA	7
High-level output voltage, bus	VOH	2.5	3.3		V	Bus IOH = -5.2 mA	7
Low-level output voltage, terminal	VOL		0.3	0.5	V	Terminal IOL = 16 mA	7
Low-level output voltage, bus	VOL		0.35	0.5	V	Bus IOL = 48 mA	7
Input current at maximum input voltage, terminal	II		0.2	100	µA	Terminal VI = 5.5 V	7
High-level input current, terminal and control inputs	IIH		0.1	20	µA	VI = 2.7 V	7
Low-level input current, terminal and control inputs	IIL		-10	-100	µA	VI = 0.5 V	7
Voltage at bus port, driver disabled	VI/O(bus)	2.5	3	3.7	V	II(bus) = 0	7
Short-circuit output current, terminal	IOS	-15	-35	-75	mA	Terminal	7
Short-circuit output current, bus	IOS	-25	-50	-125	mA	Bus	7
Supply current	ICC			110	mA	No load, TE, DE, and SC low	7
Bus port capacitance	CI/O(bus)		16		pF	VCC = 5 V to 0	7
Propagation delay time, low- to high-level output, terminal to bus	tPLH		14	20	ns	VCC = 5 V, CL = 30 pF, TA = 25°C, see Figure 1	8
Propagation delay time, high- to low-level output, terminal to bus	tPHL		14	20	ns	VCC = 5 V, CL = 30 pF, TA = 25°C, see Figure 1	8
Propagation delay time, low- to high-level output, terminal to bus (SRQ, NDAC, NRFD)	tPLH		29	35	ns	VCC = 5 V, CL = 30 pF, TA = 25°C, see Figure 1	8
Propagation delay time, low- to high-level output, bus to terminal	tPLH		10	20	ns	VCC = 5 V, CL = 30 pF, TA = 25°C, see Figure 2	8
Propagation delay time, high- to low-level output, bus to terminal	tPHL		15	22	ns	VCC = 5 V, CL = 30 pF, TA = 25°C, see Figure 2	8

CAD (KiCad official)

Symbol: SN75161BN
Footprint: Package_DIP:DIP-20_W7.62mm
3D model: PDIP-20 (KiCad packages3D, STEP)
3D model files: sn75161bn-etched.step / sn75161bn-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn75161bn.step / sn75161bn.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (24 pp, sha256 c8a84578ea8156c4, retrieved 2026-11-09, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

SN75161BN

Verified SN75161BN

Verification log 1 record

3D Model

Symbol & Footprint

Schematic Symbol

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Datasheet

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