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SN74ALS259DR
Public Made by Adomby adom
Texas Instruments Latches, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSN74ALS259DR
Texas Instruments · Latches · SOIC-16
SN74ALS259DR from Texas Instruments, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S0 | input | Address select input S0 (LSB) chooses which of the eight latches is addressed, and it must be stable with 15 ns minimum setup before G rises and 0 ns hold after G rises for the SN74ALS259. |
| 2 | S1 | input | Address select input S1 chooses which of the eight latches is addressed, and it must be stable with 15 ns minimum setup before G rises and 0 ns hold after G rises for the SN74ALS259. |
| 3 | S2 | input | Address select input S2 (MSB) chooses which of the eight latches is addressed, and it must be stable with 15 ns minimum setup before G rises and 0 ns hold after G rises for the SN74ALS259. |
| 4 | Q0 | output | Latch output Q0 follows D when latch 0 is addressed in the addressable-latch mode, and is rated for IOL of 8 mA and IOH of −0.4 mA. |
| 5 | Q1 | output | Latch output Q1 follows D when latch 1 is addressed in the addressable-latch mode, and is rated for IOL of 8 mA and IOH of −0.4 mA. |
| 6 | Q2 | output | Latch output Q2 follows D when latch 2 is addressed in the addressable-latch mode, and is rated for IOL of 8 mA and IOH of −0.4 mA. |
| 7 | Q3 | output | Latch output Q3 follows D when latch 3 is addressed in the addressable-latch mode, and is rated for IOL of 8 mA and IOH of −0.4 mA. |
| 8 | GND | power_in | Ground reference for the device. |
| 9 | Q4 | output | Latch output Q4 follows D when latch 4 is addressed in the addressable-latch mode, and is rated for IOL of 8 mA and IOH of −0.4 mA. |
| 10 | Q5 | output | Latch output Q5 follows D when latch 5 is addressed in the addressable-latch mode, and is rated for IOL of 8 mA and IOH of −0.4 mA. |
| 11 | Q6 | output | Latch output Q6 follows D when latch 6 is addressed in the addressable-latch mode, and is rated for IOL of 8 mA and IOH of −0.4 mA. |
| 12 | Q7 | output | Latch output Q7 follows D when latch 7 is addressed in the addressable-latch mode, and is rated for IOL of 8 mA and IOH of −0.4 mA. |
| 13 | D | input | Data input written into the addressed latch when G is low and CLR is high, with 15 ns minimum setup and 0 ns hold relative to G rising for the SN74ALS259. |
| 14 | G | input | Active-low enable G: the addressed latch takes the D level while G is low, and G should be held high while the address lines change to avoid erroneous data entry. |
| 15 | CLR | input | Active-low asynchronous clear: when low, all outputs Q0 through Q7 are forced low regardless of address and data, with a minimum low pulse of 10 ns. |
| 16 | VCC | power_in | Supply voltage, recommended 4.5 V to 5.5 V (5 V nominal), with an absolute maximum of 7 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-16 |
| Category | Logic |
| Pins | 16 |
CAD (KiCad official)
- Symbol:
SN74ALS259DR - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SOIC-16 (KiCad packages3D, STEP)
- 3D model files:
sn74als259dr-etched.step/sn74als259dr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74als259dr.step/sn74als259dr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (15 pp, sha256
cce17731d8cdfeff, retrieved 2026-10-07, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).