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Contents

README

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TSA20N50MR

Truesemi · MOSFETs · TO-3P-3

TSA20N50MR from Truesemi, in a TO-3P-3. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G input Gate; controls the channel, with VGS rated ±30 V maximum and threshold voltage of 2.0 to 4.0 V at VDS = VGS, ID = 250 uA.
2 D passive Drain; rated for 500 V VDSS and 20 A continuous current at TC = 25℃ (80 A pulsed).
3 S passive Source; main current return terminal, with body diode continuous forward current up to 20 A.

Key specifications

Parameter Value
Manufacturer Truesemi
Package TO-3P-3
Category Transistors/Thyristors
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Voltage VDSS 500 V 1
Gate-Source Voltage VGS -30 30 V 1
Drain Current ID 20 A TC = 25℃ 1
Drain Current ID 13 A TC = 100℃ 1
Pulsed Drain Current IDM 80 A Note 1 1
Single Pulsed Avalanche Energy EAS 1110 mJ Note 2 1
Repetitive Avalanche Energy EAR 28 mJ Note 1 1
Peak Diode Recovery dv/dt dv/dt 4.5 V/ns Note 3 1
Power Dissipation PD 280 W TC = 25℃ 1
Power Dissipation Derating PD 2.3 W/℃ Derate above 25℃ 1
Operating and Storage Temperature Range TJ, TSTG -55 150 ℃ 1
Maximum lead temperature for soldering purposes TL 300 ℃ 1/8 inch from case for 5 seconds 1
Thermal Resistance, Junction-to-Case RθJC 0.44 ℃/W 1
Thermal Resistance, Junction-to-Ambient RθJA 40 ℃/W 1
Continuous Source-Drain Diode Forward Current IS 20 A 2
Pulsed Source-Drain Diode Forward Current ISM 80 A 2
Source-Drain Diode Forward Voltage VSD 1.5 V IS = 20 A, VGS = 0 V 2
Drain-Source Breakdown Voltage BVDSS 500 V VGS = 0 V, ID = 250 uA 2
Zero Gate Voltage Drain Current IDSS 1 uA VDS = 500 V, VGS = 0 V 2
Zero Gate Voltage Drain Current IDSS 10 uA VDS = 400 V, TJ = 125℃ 2
Gate-Body Leakage Current, Forward IGSSF 100 nA VGS = 30 V, VDS = 0 V 2
Gate-Body Leakage Current, Reverse IGSSR -100 nA VGS = -30 V, VDS = 0 V 2
Gate Threshold Voltage VGS(th) 2 4 V VDS = VGS, ID = 250 uA 2
Static Drain-Source On-Resistance RDS(ON) 0.25 0.3 Ω VGS = 10 V, ID = 10 A 2
Thermal Resistance, Case-to-Sink RθCS 0.24 ℃/W 1

CAD (KiCad official)

  • Symbol: TSA20N50MR
  • Footprint: Package_TO_SOT_THT:TO-3P-3_Vertical
  • 3D model: TO-3P-3 (KiCad packages3D, STEP)
  • 3D model files: tsa20n50mr-etched.step / tsa20n50mr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tsa20n50mr.step / tsa20n50mr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Truesemi datasheet (6 pp, sha256 0b8f993fdb94c2af, retrieved 2026-10-29, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF