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ucc28064adr

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Texas Instruments AC-DC Controllers and Regulators, SOIC-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.

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UCC28064ADR

Texas Instruments · AC-DC Controllers and Regulators · SOIC-16

UCC28064ADR from Texas Instruments, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 ZCD_B input Phase B zero-current detection input. Connects to a sense winding on the phase B boost inductor via a series resistor (20-80 kΩ) to detect inductor current returning to zero for transition-mode switching. Absolute max range −0.5 V to 4 V; ±5 mA continuous current rating.
2 VSENSE input Voltage-loop error-amplifier inverting input. Connects to the resistor divider from the PFC bulk output to regulate the boost output voltage and drives the internal transconductance error amplifier whose output is COMP. Absolute max −0.5 V to 7 V.
3 TSET input Timing-set pin. A resistor from TSET to AGND (66.5 kΩ to 400 kΩ) programs the maximum PWM on-time and internal timing references for the transition-mode controller.
4 PHB input Phase B enable/disable threshold input. Programs the input-voltage / load threshold (0-2 V) at which phase B is disabled to improve light-load efficiency by dropping to single-phase operation. Absolute max −0.5 V to 7 V.
5 COMP output Error-amplifier output and voltage-loop compensation node. External Type-II compensation network (capacitors and resistors to AGND) sets the voltage loop bandwidth; internal clamp limits the swing. Absolute max −0.5 V to 7 V.
6 AGND power_in Analog ground reference for the internal control circuitry, error amplifier, and all small-signal thresholds. Should be Kelvin-connected to the PGND at a single point to minimize switching-noise coupling into the analog reference.
7 VINAC input Input AC-line voltage sense. Connects via a high-value resistor divider from the rectified line to sense the AC input for line feed-forward, brownout/dropout detection and phase-management logic. Absolute max −0.5 V to 7 V; operating range 0-6 V.
8 HVSEN input High-voltage output sense input for fail-safe over-voltage protection. Independent divider from the PFC bulk output (operating 0.8-4.5 V) provides redundant OVP detection separate from the VSENSE regulation path. Absolute max −0.5 V to 7 V.
9 BRST input Burst-mode threshold input. Sets the light-load threshold (0 to V_PHB − 0.6 V) below which the controller enters burst mode to reduce bias current and improve stand-by efficiency. Absolute max −0.5 V to 7 V.
10 CS input Current-sense input for both phases. Connects to the common current-sense resistor via a series resistor to limit peak inrush current; used for cycle-by-cycle peak-current limit and inrush-safe protection. Absolute max −0.5 V to 3 V; peak input current up to −30 mA.
11 GDB output Phase B gate driver output. Drives the gate of the phase B boost MOSFET; a small series resistor is recommended to damp resonant ringing from stray inductance. Absolute max −0.5 V to VCC + 0.3 V; ±25 mA continuous drive.
12 VCC power_in Bias supply input. Recommended 14-21 V from a low-impedance source (or 8-18 mA from a high-impedance source); internally clamped at ~22-26 V at 10 mA. UVLO turn-on 9.45-11.1 V, turn-off 8.8-10.7 V. Absolute max −0.5 V to 21 V continuous.
13 PGND power_in Power ground return for the gate-driver output stages (GDA/GDB). Should carry the high dI/dt gate-drive return currents and be tied to AGND at a single point near the IC to keep switching noise off the analog reference.
14 GDA output Phase A gate driver output. Drives the gate of the phase A boost MOSFET; small series resistor recommended to damp resonant ringing from stray inductance. Absolute max −0.5 V to VCC + 0.3 V; ±25 mA continuous drive.
15 VREF power_out Internal voltage reference output. Provides a regulated bias for external divider/programming networks; load capability up to −2 mA. Bypass with a small ceramic capacitor to AGND.
16 ZCD_A input Phase A zero-current detection input. Connects to a sense winding on the phase A boost inductor via a series resistor (20-80 kΩ) to detect inductor current returning to zero for transition-mode switching. Absolute max −0.5 V to 4 V; ±5 mA continuous current rating.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-16
Category PMIC
Pins 16

Ordering variants

  • UCC28064ADR
  • UCC28064ADRD

CAD (KiCad official)

  • Symbol: UCC28064ADR
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOIC-16 (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (None pp, sha256 4d3a510106161939, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

Symbol & Footprint

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Datasheet

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