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PGA849RGTR

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Texas Instruments Programmable / Variable Gain Amplifiers (PGA/VGA), VQFN-16-EP(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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3D Model

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Contents

README

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PGA849RGTR

Texas Instruments · Programmable / Variable Gain Amplifiers (PGA/VGA) · VQFN-16-EP(3x3)

PGA849RGTR from Texas Instruments, in a VQFN-16-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 A2 input Gain option pin 2, one of three digital gain-select pins (A2, A1, A0) referenced to DGND, with voltage limited to VDGND - 0.5 V to (VS+) + 0.5 V.
2 IN+ input Positive (noninverting) input, protected against overvoltage up to ±40 V beyond the supplies.
3 IN- input Negative (inverting) input, protected against overvoltage up to ±40 V beyond the supplies.
4 A0 input Gain option pin 0, one of three digital gain-select pins (A2, A1, A0) referenced to DGND, with voltage limited to VDGND - 0.5 V to (VS+) + 0.5 V.
5 A1 input Gain option pin 1, one of three digital gain-select pins (A2, A1, A0) referenced to DGND, with voltage limited to VDGND - 0.5 V to (VS+) + 0.5 V.
6 VS+ power_in Input-stage positive supply, 8 V to 36 V single supply or ±4 V to ±18 V dual supply.
7 LVDD power_in Output-driver positive supply, 4.5 V to 36 V single supply or ±2.25 V to ±18 V dual supply.
8 NC unconnected Do not connect.
9 DA_IN+ input Connection to output difference amplifier summing node.
10 REF input Reference input that must be driven by a low-impedance source, with voltage limited to VLVSS - 0.5 V to VLVDD + 0.5 V.
11 OUT output Signal output, with voltage limited to VLVSS - 0.5 V to VLVDD + 0.5 V and continuous short-circuit to VSOUT/2.
12 DA_IN- input Connection to output difference amplifier summing node.
13 NC unconnected Do not connect.
14 LVSS power_in Output-driver negative supply, 4.5 V to 36 V total output-stage supply span (VLVDD - VLVSS).
15 VS- power_in Input-stage negative supply, 8 V to 36 V total input-stage supply span (VS+ - VS-).
16 DGND power_in Ground reference for digital-logic and gain-setting pins.
17 Thermal Pad passive Thermal pad must be soldered to the PCB and connected to a plane or large copper pour that is either floating or electrically connected to VS-.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package VQFN-16-EP(3x3)
Category Amplifiers/Comparators
Pins 17

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Offset voltage (RTI) VOS -350 50 350 µV G = 1 to 16 5
Offset voltage drift (RTI) -1 0.2 1 µV/°C G = 1 to 16, TA = -40°C to +125°C 5
PSRR G=0.125 PSRR 95 110 dB ±4V ≤ VS ≤ ±18V, RTI, G = 0.125 5
PSRR G=0.25 PSRR 98 114 dB ±4V ≤ VS ≤ ±18V, RTI, G = 0.25 5
PSRR G=0.5 PSRR 100 118 dB ±4V ≤ VS ≤ ±18V, RTI, G = 0.5 5
PSRR G=1 PSRR 120 134 dB ±4V ≤ VS ≤ ±18V, RTI, G = 1 5
PSRR G=2 PSRR 120 126 dB ±4V ≤ VS ≤ ±18V, RTI, G = 2 5
PSRR G=4 PSRR 120 132 dB ±4V ≤ VS ≤ ±18V, RTI, G = 4 5
PSRR G=8 PSRR 120 136 dB ±4V ≤ VS ≤ ±18V, RTI, G = 8 5
PSRR G=16 PSRR 120 140 dB ±4V ≤ VS ≤ ±18V, RTI, G = 16 5
CMRR G=0.125 CMRR 64 82 dB DC to 60Hz, VICM = ±10V, TA = -40°C to +125°C, RTI, G = 0.125 5
CMRR G=0.25 CMRR 70 88 dB DC to 60Hz, VICM = ±10V, TA = -40°C to +125°C, RTI, G = 0.25 5
CMRR G=0.5 CMRR 76 94 dB DC to 60Hz, VICM = ±10V, TA = -40°C to +125°C, RTI, G = 0.5 5
CMRR G=1 CMRR 82 100 dB DC to 60Hz, VICM = ±10V, TA = -40°C to +125°C, RTI, G = 1 5
CMRR G=2 CMRR 88 106 dB DC to 60Hz, VICM = ±10V, TA = -40°C to +125°C, RTI, G = 2 5
CMRR G=4 CMRR 94 112 dB DC to 60Hz, VICM = ±10V, TA = -40°C to +125°C, RTI, G = 4 5
CMRR G=8 CMRR 100 118 dB DC to 60Hz, VICM = ±10V, TA = -40°C to +125°C, RTI, G = 8 5
CMRR G=16 CMRR 106 124 dB DC to 60Hz, VICM = ±10V, TA = -40°C to +125°C, RTI, G = 16 5
Input bias current IB -1.8 0.5 1.8 nA 5
Input offset current IOS -1 0.5 1 nA 5
Gain error G=0.125 GE -0.045 0.01 0.045 % G = 0.125 6
Gain error G=0.25 GE -0.03 0.005 0.03 % G = 0.25 6
Gain error G=0.5 GE -0.03 0.005 0.03 % G = 0.5 6
Gain error G=1 GE -0.015 0.005 0.015 % G = 1 6
Gain error G=2 GE -0.03 0.01 0.03 % G = 2 6
Gain error G=4 GE -0.04 0.015 0.04 % G = 4 6
Gain error G=8 GE -0.04 0.015 0.04 % G = 8 6
Gain error G=16 GE -0.07 0.03 0.07 % G = 16 6
Gain nonlinearity 2 5 ppm G = 0.125 to 16, VOUT > ±5V 6
Gain drift -2 1 2 ppm/°C G = 0.125 to 16, TA = -40°C to +125°C 6
Short-circuit current ISC 45 mA Continuous to VSOUT / 2 6
Reference gain error 0.01 0.05 % VOUT = ±10V, inside the voltage swing range 7
Input stage quiescent current IQ_input 3 3.7 mA VS+, VS-, VIN = 0V 7
Input stage quiescent current (temp) IQ_input 4.6 mA VS+, VS-, TA = -40°C to +125°C 7
Output stage quiescent current IQ_output 2.3 2.8 mA LVDD, LVSS, VIN = 0V, VREF = 0V 7
Output stage quiescent current (temp) IQ_output 3.5 mA LVDD, LVSS, TA = -40°C to 125°C 7
Digital input pin current 1.5 3 µA A0, A1, A2 pins 7
DGND reference current 4 10 µA 7
Supply voltage VS+ to VS- VS 0 40 V VS = (VS+), (VS-) 4
Output supply voltage VSOUT 0 40 V VSOUT = VLVDD, VLVSS 4
Signal-output pins current IO -100 100 mA 4
Operating temperature TA -50 150 °C 4
Junction temperature TJ 175 °C 4
Storage temperature Tstg -65 150 °C 4
Input stage supply voltage, single supply VS 8 36 V Single supply 4
Output stage supply voltage, single supply VSOUT 4.5 36 V Single supply 4
Specified temperature TA -40 125 °C 4
Junction-to-ambient thermal resistance RθJA 47.3 °C/W RGT (VQFN) 16 pins 4
Junction-to-case (top) thermal resistance RθJC(top) 53.6 °C/W RGT (VQFN) 16 pins 4
Junction-to-board thermal resistance RθJB 22 °C/W RGT (VQFN) 16 pins 4
Junction-to-top characterization parameter ψJT 1.4 °C/W RGT (VQFN) 16 pins 4
Junction-to-board characterization parameter ψJB 22 °C/W RGT (VQFN) 16 pins 4
Junction-to-case (bottom) thermal resistance RθJC(bot) 7.8 °C/W RGT (VQFN) 16 pins 4

CAD (KiCad official)

  • Symbol: PGA849RGTR
  • Footprint: Package_DFN_QFN:QFN-16-1EP_3x3mm_P0.5mm_EP1.7x1.7mm
  • 3D model: VQFN-16-EP(3x3) (KiCad packages3D, STEP)
  • 3D model files: pga849rgtr-etched.step / pga849rgtr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); pga849rgtr.step / pga849rgtr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (39 pp, sha256 f8ac5f79996963af, retrieved 2026-10-27, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF