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CD74HCT393M96
Public Made by Adomby adom
Texas Instruments Logic ICs, SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownCD74HCT393M96
Texas Instruments · Logic ICs · SOIC-14
CD74HCT393M96 from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1CP | input | Counter 1 clock input, active on the negative (high-to-low) transition; HCT input thresholds VIL 0.8 V max, VIH 2 V min. |
| 2 | 1MR | input | Counter 1 master reset input; a high level resets all counter 1 outputs to the low state. |
| 3 | 1Q0 | output | Counter 1 stage 0 (first-stage) buffered output. |
| 4 | 1Q1 | output | Counter 1 stage 1 buffered output. |
| 5 | 1Q2 | output | Counter 1 stage 2 buffered output. |
| 6 | 1Q3 | output | Counter 1 stage 3 (last-stage) buffered output. |
| 7 | GND | power_in | Ground reference. |
| 8 | 2Q3 | output | Counter 2 stage 3 (last-stage) buffered output. |
| 9 | 2Q2 | output | Counter 2 stage 2 buffered output. |
| 10 | 2Q1 | output | Counter 2 stage 1 buffered output. |
| 11 | 2Q0 | output | Counter 2 stage 0 (first-stage) buffered output. |
| 12 | 2MR | input | Counter 2 master reset input; a high level resets all counter 2 outputs to the low state. |
| 13 | 2CP | input | Counter 2 clock input, active on the negative (high-to-low) transition; HCT input thresholds VIL 0.8 V max, VIH 2 V min. |
| 14 | VCC | power_in | Supply voltage; HCT types operate from 4.5 V to 5.5 V, with a 0.1 µF bypass capacitor recommended close to the pin. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-14 |
| Category | Logic ICs |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage range, HCT types | VCC | 4.5 | 5.5 | V | HCT types | 4 | |
| Input rise and fall time | 500 | ns | VCC = 4.5 V | 4 | |||
| Temperature range | TA | -55 | 125 | ℃ | 4 | ||
| Supply voltage | VCC | -0.5 | 7 | V | 4 | ||
| Input diode current | IIK | -20 | 20 | mA | For VI < -0.5 V or VI > VCC + 0.5 V | 4 | |
| Output diode current | IOK | -20 | 20 | mA | For VO < -0.5 V or VO > VCC + 0.5 V | 4 | |
| Output source or sink current per output pin | IO | -25 | 25 | mA | For VO > -0.5 V or VO < VCC + 0.5 V | 4 | |
| Continuous current through VCC or GND | -50 | 50 | mA | 4 | |||
| Junction temperature | TJ | 150 | °C | 4 | |||
| Storage temperature range | Tstg | -65 | 150 | °C | 4 | ||
| Lead temperature (soldering) | 300 | °C | Soldering 10 s, SOIC lead tips only | 4 | |||
| Junction-to-ambient thermal resistance | RθJA | 86 | °C/W | D (SOIC) package, 14 pins | 4 | ||
| High-level input voltage | VIH | 2 | V | VCC 4.5 to 5.5 V | 5 | ||
| Low-level input voltage | VIL | 0.8 | V | VCC 4.5 to 5.5 V | 5 | ||
| High-level output voltage, CMOS loads | VOH | 4.4 | V | IOH = -20 µA; VCC 4.5 V | 5 | ||
| High-level output voltage, TTL loads, 25 ℃ | VOH | 3.98 | V | IOH = -4 mA; VCC 4.5 V; 25 ℃ | 5 | ||
| High-level output voltage, TTL loads, -40 to 85 ℃ | VOH | 3.84 | V | IOH = -4 mA; VCC 4.5 V; -40 to 85 ℃ | 5 | ||
| High-level output voltage, TTL loads, -55 to 125 ℃ | VOH | 3.7 | V | IOH = -4 mA; VCC 4.5 V; -55 to 125 ℃ | 5 | ||
| Low-level output voltage, CMOS loads | VOL | 0.1 | V | IOL = 20 µA; VCC 4.5 V | 5 | ||
| Low-level output voltage, TTL loads, 25 ℃ | VOL | 0.26 | V | IOL = 4 mA; VCC 4.5 V; 25 ℃ | 5 | ||
| Low-level output voltage, TTL loads, -40 to 85 ℃ | VOL | 0.33 | V | IOL = 4 mA; VCC 4.5 V; -40 to 85 ℃ | 5 | ||
| Low-level output voltage, TTL loads, -55 to 125 ℃ | VOL | 0.4 | V | IOL = 4 mA; VCC 4.5 V; -55 to 125 ℃ | 5 | ||
| Input leakage current, 25 ℃ | II | -0.1 | 0.1 | µA | VCC and GND; VCC 5.5 V; 25 ℃ | 5 | |
| Input leakage current, -40 to 85 ℃ | II | -1 | 1 | µA | VCC and GND; VCC 5.5 V; -40 to 85 ℃ | 5 | |
| Input leakage current, -55 to 125 ℃ | II | -1 | 1 | µA | VCC and GND; VCC 5.5 V; -55 to 125 ℃ | 5 | |
| Supply current, 25 ℃ | ICC | 8 | µA | VCC or GND; VCC 5.5 V; 25 ℃ | 5 | ||
| Supply current, -40 to 85 ℃ | ICC | 80 | µA | VCC or GND; VCC 5.5 V; -40 to 85 ℃ | 5 | ||
| Supply current, -55 to 125 ℃ | ICC | 160 | µA | VCC or GND; VCC 5.5 V; -55 to 125 ℃ | 5 | ||
| Additional supply current per input pin (nCP), 25 ℃ | ΔICC | 100 | 144 | µA | nCP input at VCC - 2.1 V; VCC 4.5 to 5.5 V; 25 ℃ | 5 | |
| Additional supply current per input pin (nCP), -40 to 85 ℃ | ΔICC | 180 | µA | nCP input at VCC - 2.1 V; VCC 4.5 to 5.5 V; -40 to 85 ℃ | 5 | ||
| Additional supply current per input pin (nCP), -55 to 125 ℃ | ΔICC | 196 | µA | nCP input at VCC - 2.1 V; VCC 4.5 to 5.5 V; -55 to 125 ℃ | 5 | ||
| Maximum clock frequency, 25 ℃ | fMAX | 27 | MHz | VCC 4.5 V; 25 ℃ | 6 | ||
| Maximum clock frequency, -40 to 85 ℃ | fMAX | 22 | MHz | VCC 4.5 V; -40 to 85 ℃ | 6 | ||
| Maximum clock frequency, -55 to 125 ℃ | fMAX | 18 | MHz | VCC 4.5 V; -55 to 125 ℃ | 6 | ||
| Clock pulse width, 25 ℃ | tW | 19 | ns | VCC 4.5 V; 25 ℃ | 6 | ||
| Clock pulse width, -40 to 85 ℃ | tW | 24 | ns | VCC 4.5 V; -40 to 85 ℃ | 6 | ||
| Clock pulse width, -55 to 125 ℃ | tW | 29 | ns | VCC 4.5 V; -55 to 125 ℃ | 6 | ||
| Reset pulse width, 25 ℃ | tW | 16 | ns | VCC 4.5 V; 25 ℃ | 6 | ||
| Reset pulse width, -40 to 85 ℃ | tW | 20 | ns | VCC 4.5 V; -40 to 85 ℃ | 6 | ||
| Reset pulse width, -55 to 125 ℃ | tW | 24 | ns | VCC 4.5 V; -55 to 125 ℃ | 6 | ||
| Propagation delay nCP to nQ0, 25 ℃ | tPLH, tPHL | 32 | ns | CL = 50 pF; VCC 4.5 V; 25 ℃ | 7 | ||
| Propagation delay nCP to nQ0, -40 to 85 ℃ | tPLH, tPHL | 40 | ns | CL = 50 pF; VCC 4.5 V; -40 to 85 ℃ | 7 | ||
| Propagation delay nCP to nQ0, -55 to 125 ℃ | tPLH, tPHL | 48 | ns | CL = 50 pF; VCC 4.5 V; -55 to 125 ℃ | 7 | ||
| Propagation delay nCP to nQ0 (5 V) | tPLH, tPHL | 13 | ns | CL = 15 pF; VCC 5 V | 7 | ||
| Propagation delay nCP to nQ1, 25 ℃ | tPLH, tPHL | 44 | ns | CL = 50 pF; VCC 4.5 V; 25 ℃ | 7 | ||
| Propagation delay nCP to nQ1, -40 to 85 ℃ | tPLH, tPHL | 55 | ns | CL = 50 pF; VCC 4.5 V; -40 to 85 ℃ | 7 | ||
| Propagation delay nCP to nQ1, -55 to 125 ℃ | tPLH, tPHL | 66 | ns | CL = 50 pF; VCC 4.5 V; -55 to 125 ℃ | 7 | ||
| Propagation delay nCP to nQ2, 25 ℃ | tPLH, tPHL | 50 | ns | CL = 50 pF; VCC 4.5 V; 25 ℃ | 7 | ||
| Propagation delay nCP to nQ2, -40 to 85 ℃ | tPLH, tPHL | 63 | ns | CL = 50 pF; VCC 4.5 V; -40 to 85 ℃ | 7 | ||
| Propagation delay nCP to nQ2, -55 to 125 ℃ | tPLH, tPHL | 75 | ns | CL = 50 pF; VCC 4.5 V; -55 to 125 ℃ | 7 | ||
| Propagation delay nCP to nQ3, 25 ℃ | tPLH, tPHL | 62 | ns | CL = 50 pF; VCC 4.5 V; 25 ℃ | 7 | ||
| Propagation delay nCP to nQ3, -40 to 85 ℃ | tPLH, tPHL | 78 | ns | CL = 50 pF; VCC 4.5 V; -40 to 85 ℃ | 7 | ||
| Propagation delay nCP to nQ3, -55 to 125 ℃ | tPLH, tPHL | 93 | ns | CL = 50 pF; VCC 4.5 V; -55 to 125 ℃ | 7 | ||
| Propagation delay MR to Qn, 25 ℃ | tPLH, tPHL | 32 | ns | CL = 50 pF; VCC 4.5 V; 25 ℃ | 7 | ||
| Propagation delay MR to Qn, -40 to 85 ℃ | tPLH, tPHL | 40 | ns | CL = 50 pF; VCC 4.5 V; -40 to 85 ℃ | 7 | ||
| Propagation delay MR to Qn, -55 to 125 ℃ | tPLH, tPHL | 48 | ns | CL = 50 pF; VCC 4.5 V; -55 to 125 ℃ | 7 | ||
| Output transition time, 25 ℃ | tTLH, tTHL | 15 | ns | CL = 50 pF; VCC 4.5 V; 25 ℃ | 7 | ||
| Output transition time, -40 to 85 ℃ | tTLH, tTHL | 19 | ns | CL = 50 pF; VCC 4.5 V; -40 to 85 ℃ | 7 | ||
| Output transition time, -55 to 125 ℃ | tTLH, tTHL | 22 | ns | CL = 50 pF; VCC 4.5 V; -55 to 125 ℃ | 7 |
CAD (KiCad official)
- Symbol:
CD74HCT393M96 - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOIC-14 (KiCad packages3D, STEP)
- 3D model files:
cd74hct393m96-etched.step/cd74hct393m96-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cd74hct393m96.step/cd74hct393m96.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (24 pp, sha256
a04797e5a4aa356d, retrieved 2026-10-17, tier: manufacturer) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).