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DG408LEDY-T1-GE3

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by Ray

Vishay Analog Switches, Multiplexers, SOIC-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.

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Contents

README

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DG408LEDY-T1-GE3

Vishay · Analog Switches, Multiplexers · SOIC-16

DG408LEDY-T1-GE3 from Vishay, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 A0 input Channel-select address bit 0 (LSB). TTL/CMOS/LV (3 V) compatible digital input; input current ±1 µA max. Together with A1, A2, and EN, selects which of the 8 S inputs is routed to D per the truth table.
2 EN input Active-high enable input. When EN = 0, all switches are off (None selected); when EN = 1, the switch addressed by A2/A1/A0 is on. TTL/CMOS/LV(3 V) compatible; VINH ≥ 2.4 V, VINL ≤ 0.8 V (at V+ = 12 V).
3 V- power_in Negative analog supply rail. For single-supply operation tie to GND; for dual-supply operation connect to the negative rail (down to -8 V). V+ to V- max 18 V; GND to V- min -18 V.
4 S1 passive Analog switch source terminal for channel 1. Bidirectional analog signal path (channel conducts equally well in both directions). Signal range 0 to 12 V at V+ = 12 V single supply, or ±5 V at ±5 V dual supply; RDS(on) ≈ 17 Ω typ.
5 S2 passive Analog switch source terminal for channel 2. Bidirectional analog input/output routed to D when A2A1A0 = 001 and EN = 1.
6 S3 passive Analog switch source terminal for channel 3. Bidirectional analog input/output routed to D when A2A1A0 = 010 and EN = 1.
7 S4 passive Analog switch source terminal for channel 4. Bidirectional analog input/output routed to D when A2A1A0 = 011 and EN = 1. Worst-case channel isolation occurs on ch 4 due to proximity to D.
8 D passive Common drain (multiplexer output/input). One of the eight S channels is connected to D based on the A0/A1/A2 address and EN. Bidirectional; peak current 100 mA (pulsed, 1 ms, 10 % duty).
9 S8 passive Analog switch source terminal for channel 8. Bidirectional analog input/output routed to D when A2A1A0 = 111 and EN = 1.
10 S7 passive Analog switch source terminal for channel 7. Bidirectional analog input/output routed to D when A2A1A0 = 110 and EN = 1.
11 S6 passive Analog switch source terminal for channel 6. Bidirectional analog input/output routed to D when A2A1A0 = 101 and EN = 1.
12 S5 passive Analog switch source terminal for channel 5. Bidirectional analog input/output routed to D when A2A1A0 = 100 and EN = 1.
13 V+ power_in Positive analog supply. 3 V to 16 V single-supply, or up to +8 V dual-supply. Sets the digital-input logic thresholds and the internal regulator that powers the decoder/driver. Quiescent supply current I+ = 3.5 µA typ (6 µA max).
14 GND power_in Digital / logic ground reference. Digital-input logic levels are referenced to GND. GND to V- min -18 V.
15 A2 input Channel-select address bit 2 (MSB). TTL/CMOS/LV(3 V) compatible digital input; input current ±1 µA max. Together with A1, A0, and EN, selects one of the 8 S channels per the truth table.
16 A1 input Channel-select address bit 1. TTL/CMOS/LV(3 V) compatible digital input; input current ±1 µA max. Together with A0, A2, and EN, selects one of the 8 S channels per the truth table.

Key specifications

Parameter Value
Manufacturer Vishay
Package SOIC-16
Category Interface
Pins 16

Ordering variants

Same part, different packaging or reel option.

  • DG408LEDY-GE3
  • DG408LEDY-T1-GE3
  • DG408LEDQ-GE3
  • DG408LEDQ-T1-GE3
  • DG408LEDN-T1-GE4

CAD (KiCad official)

  • Symbol: DG408LEDY-T1-GE3
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOIC-16 (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Vishay datasheet (18 pp, sha256 25c17230a1edebf9, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF