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STM32F101T6U6A
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), QFN-36-EP(6x6). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSTM32F101T6U6A
STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · QFN-36-EP(6x6)
STM32F101T6U6A from STMicroelectronics, in a QFN-36-EP(6x6). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD_3 | power_in | Digital supply pin for I/Os and internal logic, specified for the 2.0 to 3.6 V application supply range. |
| 2 | OSC_IN/PD0 | input | External 4-16 MHz high-speed oscillator input after reset; the pin can be remapped by software to GPIO PD0. |
| 3 | OSC_OUT/PD1 | output | External 4-16 MHz high-speed oscillator output after reset; the pin can be remapped by software to GPIO PD1. |
| 4 | NRST | bidirectional | Active reset pin for the device; its electrical limits are given in the NRST pin characteristics (Section 5.3.14). |
| 5 | VSSA | power_in | Analog ground reference for the ADC and analog blocks. |
| 6 | VDDA | power_in | Analog supply for the ADC and analog blocks; the ADC conversion range is 0 to 3.6 V and the temperature sensor requires 2 V to 3.6 V. |
| 7 | PA0-WKUP | bidirectional | General-purpose I/O (standard, not 5 V tolerant per Table 4) with WKUP, USART2_CTS, ADC_IN0 and TIM2_CH1_ETR alternate functions. |
| 8 | PA1 | bidirectional | General-purpose I/O (standard, not 5 V tolerant per Table 4) with USART2_RTS, ADC_IN1 and TIM2_CH2 alternate functions. |
| 9 | PA2 | bidirectional | General-purpose I/O (standard, not 5 V tolerant per Table 4) with USART2_TX, ADC_IN2 and TIM2_CH3 alternate functions. |
| 10 | PA3 | bidirectional | General-purpose I/O (standard, not 5 V tolerant per Table 4) with USART2_RX, ADC_IN3 and TIM2_CH4 alternate functions. |
| 11 | PA4 | bidirectional | General-purpose I/O (standard, not 5 V tolerant per Table 4) with SPI_NSS, ADC_IN4 and USART2_CK alternate functions. |
| 12 | PA5 | bidirectional | General-purpose I/O (standard, not 5 V tolerant per Table 4) with SPI_SCK and ADC_IN5 alternate functions. |
| 13 | PA6 | bidirectional | General-purpose I/O (standard, not 5 V tolerant per Table 4) with SPI_MISO, ADC_IN6 and TIM3_CH1 alternate functions. |
| 14 | PA7 | bidirectional | General-purpose I/O (standard, not 5 V tolerant per Table 4) with SPI_MOSI, ADC_IN7 and TIM3_CH2 alternate functions. |
| 15 | PB0 | bidirectional | General-purpose I/O (standard, not 5 V tolerant per Table 4) with ADC_IN8 and TIM3_CH3 alternate functions. |
| 16 | PB1 | bidirectional | General-purpose I/O (standard, not 5 V tolerant per Table 4) with ADC_IN9 and TIM3_CH4 alternate functions. |
| 17 | PB2/BOOT1 | bidirectional | 5 V tolerant general-purpose I/O (FT) that also carries the BOOT1 boot-mode function. |
| 18 | VSS_1 | power_in | Digital ground pin for the I/Os and internal logic. |
| 19 | VDD_1 | power_in | Digital supply pin for I/Os and internal logic, specified for the 2.0 to 3.6 V application supply range. |
| 20 | PA8 | bidirectional | 5 V tolerant general-purpose I/O (FT) with USART1_CK and MCO alternate functions. |
| 21 | PA9 | bidirectional | 5 V tolerant general-purpose I/O (FT) with USART1_TX alternate function. |
| 22 | PA10 | bidirectional | 5 V tolerant general-purpose I/O (FT) with USART1_RX alternate function. |
| 23 | PA11 | bidirectional | 5 V tolerant general-purpose I/O (FT) with USART1_CTS alternate function. |
| 24 | PA12 | bidirectional | 5 V tolerant general-purpose I/O (FT) with USART1_RTS alternate function. |
| 25 | PA13 | bidirectional | 5 V tolerant I/O (FT) that carries the JTMS/SWDIO debug function after reset. |
| 26 | VSS_2 | power_in | Digital ground pin for the I/Os and internal logic. |
| 27 | VDD_2 | power_in | Digital supply pin for I/Os and internal logic, specified for the 2.0 to 3.6 V application supply range. |
| 28 | PA14 | bidirectional | 5 V tolerant I/O (FT) that carries the JTCK/SWCLK debug function after reset. |
| 29 | PA15 | bidirectional | 5 V tolerant general-purpose I/O (FT) with JTDI, TIM2_CH1_ETR and SPI_NSS alternate functions. |
| 30 | PB3 | bidirectional | 5 V tolerant general-purpose I/O (FT) with JTDO/TRACESWO, TIM2_CH2 and SPI_SCK alternate functions. |
| 31 | PB4 | bidirectional | 5 V tolerant general-purpose I/O (FT) with NJTRST, TIM3_CH1 and SPI_MISO alternate functions. |
| 32 | PB5 | bidirectional | General-purpose I/O (standard, not 5 V tolerant per Table 4) with I2C_SMBA, TIM3_CH2 and SPI_MOSI alternate functions. |
| 33 | PB6 | bidirectional | 5 V tolerant general-purpose I/O (FT) with I2C_SCL and USART1_TX alternate functions. |
| 34 | PB7 | bidirectional | 5 V tolerant general-purpose I/O (FT) with I2C_SDA and USART1_RX alternate functions. |
| 35 | BOOT0 | input | Boot mode selection input that sets the device boot source together with BOOT1. |
| 36 | VSS_3 | power_in | Digital ground pin for the I/Os and internal logic. |
| 37 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | QFN-36-EP(6x6) |
| Category | Embedded Processors & Controllers |
| Pins | 37 |
CAD (KiCad official)
- Symbol:
STM32F101T6U6A - Footprint:
Package_DFN_QFN:QFN-36-1EP_6x6mm_P0.5mm_EP3.7x3.7mm - 3D model: QFN-36-EP(6x6) (KiCad packages3D, STEP)
- 3D model files:
stm32f101t6u6a-etched.step/stm32f101t6u6a-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);stm32f101t6u6a.step/stm32f101t6u6a.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (87 pp, sha256
a0484b8e7d5434bf, retrieved 2026-10-08, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).