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TPS7B7033QPWPRQ1
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Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, HTSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTPS7B7033QPWPRQ1
Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · HTSSOP-16
TPS7B7033QPWPRQ1 from Texas Instruments, in a HTSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IN | power_in | Unregulated device input supply; the datasheet recommends 4 V to 40 V, with absolute maximum of 45 V. |
| 2 | EN | input | Enable input, high-voltage tolerant up to VIN: a level above 2 V (VIH) enables the regulator and a level below 0.7 V (VIL) disables it. |
| 3 | GND | power_in | Ground reference. |
| 4 | GND | power_in | Ground reference. |
| 5 | GND | power_in | Ground reference. |
| 6 | GND | power_in | Ground reference. |
| 7 | GND | power_in | Ground reference. |
| 8 | DELAY | output | Power-good delay adjustment pin; a capacitor from this pin to ground sets the power-good delay, and if left open the fixed delay t(DLY_FIX) applies. Absolute maximum is 7 V. |
| 9 | GND | power_in | Ground reference. |
| 10 | GND | power_in | Ground reference. |
| 11 | VINT | input | Internal voltage rail; tie above 2 V for lowest IGND, with absolute maximum of 7 V. |
| 12 | GND | power_in | Ground reference. |
| 13 | GND | power_in | Ground reference. |
| 14 | PG | output | Open-drain power-good output, pulled up to VOUT or a reference through a resistor and pulled low to ground when the output is not ready; rated 0 V to 5.5 V recommended. |
| 15 | PGADJ | output | Power-good threshold adjustment; a resistor divider between PGADJ and OUT sets the threshold, and tying it to ground selects the default 91.6% of VOUT threshold, with a 1.1 V internal reference. |
| 16 | OUT | power_out | Regulated 3.3 V or 5 V output; recommended operating range 0 V to 5.5 V with output current up to 300 mA. |
| 17 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | HTSSOP-16 |
| Category | Power Management (PMIC) |
| Pins | 17 |
CAD (KiCad official)
- Symbol:
TPS7B7033QPWPRQ1 - Footprint:
Package_SO:TSSOP-16-1EP_4.4x5mm_P0.65mm - 3D model: HTSSOP-16 (KiCad packages3D, STEP)
- 3D model files:
tps7b7033qpwprq1-etched.step/tps7b7033qpwprq1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps7b7033qpwprq1.step/tps7b7033qpwprq1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (25 pp, sha256
6955cc70e8bc9b62, retrieved 2026-10-07, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).