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STM32L041C6T7
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-48(7x7). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
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PCB Footprint
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Datasheet
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README
markdownSTM32L041C6T7
STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-48(7x7)
STM32L041C6T7 from STMicroelectronics, in a LQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PC0 | bidirectional | 5 V tolerant I/O (FT) with alternate functions LPTIM1_IN1, EVENTOUT and LPUART1_RX. |
| 2 | PC13 | bidirectional | 5 V tolerant I/O (FT) with the additional function ANTI_TAMP and TAMP1/WKUP2. |
| 3 | PC14 | bidirectional | Standard 3.3 V I/O (TC) that doubles as the OSC32_IN low-speed oscillator input. |
| 4 | PC15 | bidirectional | Standard 3.3 V I/O (TC) that doubles as the OSC32_OUT low-speed oscillator output. |
| 5 | PH0 | bidirectional | Standard 3.3 V I/O (TC) that doubles as the OSC_IN high-speed oscillator input. |
| 6 | PH1 | bidirectional | Standard 3.3 V I/O (TC) that doubles as the OSC_OUT high-speed oscillator output. |
| 7 | NRST | bidirectional | Bidirectional reset pin with embedded weak pull-up resistor. |
| 8 | VSSA | power_in | Analog ground pin for the ADC and reference section. |
| 9 | VDDA | power_in | Analog supply pin for the ADC and comparators, operating down to 1.65 V as stated in the features. |
| 10 | PA0 | bidirectional | Standard 3.3 V I/O (TC) with ADC_IN0, COMP1_INM6 and RTC_TAMP2/WKUP1 additional functions. |
| 11 | PA1 | bidirectional | 5 V tolerant I/O (FT) with ADC_IN1 and COMP1_INP additional functions. |
| 12 | PA2 | bidirectional | Standard 3.3 V I/O (TC) with ADC_IN2, COMP2_INM6 and USART2_TX alternate function. |
| 13 | PA3 | bidirectional | 5 V tolerant I/O (FT) with ADC_IN3, COMP2_INP and USART2_RX alternate function. |
| 14 | PA4 | bidirectional | Standard 3.3 V I/O (TC) with ADC_IN4 and SPI1_NSS alternate function. |
| 15 | PA5 | bidirectional | Standard 3.3 V I/O (TC) with ADC_IN5 and SPI1_SCK alternate function. |
| 16 | PA6 | bidirectional | 5 V tolerant I/O (FT) with ADC_IN6 and SPI1_MISO alternate function. |
| 17 | PA7 | bidirectional | 5 V tolerant I/O (FT) with ADC_IN7 and SPI1_MOSI alternate function. |
| 18 | PB0 | bidirectional | 5 V tolerant I/O (FT) with ADC_IN8, VREF_OUT and SPI1_MISO alternate function. |
| 19 | PB1 | bidirectional | 5 V tolerant I/O (FT) with ADC_IN9, VREF_OUT and USART2_CK alternate function. |
| 20 | PB2 | bidirectional | 5 V tolerant I/O (FT) with LPTIM1_OUT alternate function. |
| 21 | PB10 | bidirectional | 5 V tolerant I/O (FT) with TIM2_CH3 and LPUART1_TX alternate functions. |
| 22 | PB11 | bidirectional | 5 V tolerant I/O (FT) with EVENTOUT, TIM2_CH4 and LPUART1_RX alternate functions. |
| 23 | VSS | power_in | Digital ground pin of the device. |
| 24 | VDD | power_in | Digital supply pin, 1.65 V to 3.6 V. |
| 25 | PB12 | bidirectional | 5 V tolerant I/O (FT) with SPI1_NSS and EVENTOUT alternate functions. |
| 26 | PB13 | bidirectional | 5 V tolerant I/O (FT) with SPI1_SCK, MCO, TIM21_CH1 and LPUART1_CTS alternate functions. |
| 27 | PB14 | bidirectional | 5 V tolerant I/O (FT) with SPI1_MISO, RTC_OUT, TIM21_CH2 and LPUART1_RTS/LPUART1_DE alternate functions. |
| 28 | PB15 | bidirectional | 5 V tolerant I/O (FT) with SPI1_MOSI and RTC_REFIN alternate functions. |
| 29 | PA8 | bidirectional | 5 V tolerant I/O (FT) with MCO, LPTIM1_IN1, EVENTOUT, USART2_CK and TIM2_CH1 alternate functions. |
| 30 | PA9 | bidirectional | 5 V tolerant, Fast-mode Plus capable I/O (FTf) with MCO, I2C1_SCL, USART2_TX and TIM22_CH1 alternate functions. |
| 31 | PA10 | bidirectional | 5 V tolerant, Fast-mode Plus capable I/O (FTf) with I2C1_SDA, USART2_RX and TIM22_CH2 alternate functions. |
| 32 | PA11 | bidirectional | 5 V tolerant I/O (FT) with SPI1_MISO, EVENTOUT, USART2_CTS, TIM21_CH2 and COMP1_OUT alternate functions. |
| 33 | PA12 | bidirectional | 5 V tolerant I/O (FT) with SPI1_MOSI, EVENTOUT, USART2_RTS/USART2_DE and COMP2_OUT alternate functions. |
| 34 | PA13 | bidirectional | 5 V tolerant I/O (FT) with SWDIO serial wire debug data, LPTIM1_ETR and LPUART1_RX alternate functions. |
| 35 | VSS | power_in | Digital ground pin of the device. |
| 36 | VDD | power_in | Digital supply pin, 1.65 V to 3.6 V. |
| 37 | PA14 | bidirectional | 5 V tolerant I/O (FT) with SWCLK serial wire debug clock, LPTIM1_OUT, I2C1_SMBA, USART2_TX and LPUART1_TX alternate functions. |
| 38 | PA15 | bidirectional | 5 V tolerant I/O (FT) with SPI1_NSS, TIM2_ETR, EVENTOUT, USART2_RX and TIM2_CH1 alternate functions. |
| 39 | PB3 | bidirectional | 5 V tolerant I/O (FT) with SPI1_SCK, TIM2_CH2 and EVENTOUT alternate functions, plus COMP2_INN. |
| 40 | PB4 | bidirectional | 5 V tolerant I/O (FT) with SPI1_MISO, EVENTOUT and TIM22_CH1 alternate functions, plus COMP2_INP. |
| 41 | PB5 | bidirectional | 5 V tolerant I/O (FT) with SPI1_MOSI, LPTIM1_IN1, I2C1_SMBA and TIM22_CH2 alternate functions, plus COMP2_INP. |
| 42 | PB6 | bidirectional | 5 V tolerant, Fast-mode Plus capable I/O (FTf) with USART2_TX, I2C1_SCL, LPTIM1_ETR and TIM21_CH1 alternate functions. |
| 43 | PB7 | bidirectional | 5 V tolerant, Fast-mode Plus capable I/O (FTf) with USART2_RX, I2C1_SDA and LPTIM1_IN2 alternate functions, plus VREF_PVD_IN. |
| 44 | BOOT0 | input | Dedicated BOOT0 pin used to select the boot mode. |
| 45 | PB8 | bidirectional | 5 V tolerant, Fast-mode Plus capable I/O (FTf) with I2C1_SCL alternate function. |
| 46 | PB9 | bidirectional | 5 V tolerant, Fast-mode Plus capable I/O (FTf) with EVENTOUT and I2C1_SDA alternate functions. |
| 47 | VSS | power_in | Digital ground pin of the device. |
| 48 | VDD | power_in | Digital supply pin, 1.65 V to 3.6 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | LQFP-48(7x7) |
| Category | Embedded Processors & Controllers |
| Pins | 48 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| External main supply voltage (VDD-VSS) | VDD-VSS | -0.3 | 4 | V | 49 | ||
| Input voltage on TC pins | VIN | -0.3 | 4 | V | 49 | ||
| Input voltage on any other pin | VIN | -0.3 | 4 | V | 49 | ||
| Total current into sum of all VDD power lines (source) | ΣIVDD | 105 | mA | 50 | |||
| Total current out of sum of all VSS ground lines (sink) | ΣIVSS | 105 | mA | 50 | |||
| Maximum current into each VDD power pin (source) | IVDD(PIN) | 100 | mA | 50 | |||
| Maximum current out of each VSS ground pin (sink) | IVSS(PIN) | 100 | mA | 50 | |||
| Output current sunk by any I/O and control pin except FTf pins | IIO | 16 | mA | 50 | |||
| Output current sunk by FTf pins | IIO | 22 | mA | 50 | |||
| Output current sourced by any I/O and control pin | IIO | -16 | mA | 50 | |||
| Storage temperature range | TSTG | -65 | 150 | °C | 50 | ||
| Maximum junction temperature | TJ | 150 | °C | 50 | |||
| Standard operating voltage VDD | VDD | 1.65 | 3.6 | V | BOR detector disabled | 51 | |
| Standard operating voltage VDD | VDD | 1.8 | 3.6 | V | BOR detector enabled, at power on | 51 | |
| Analog operating voltage (all features) | VDDA | 1.65 | 3.6 | V | Must be the same voltage as VDD | 51 | |
| Internal AHB clock frequency | fHCLK | 0 | 32 | MHz | 51 | ||
| Input voltage on FT, FTf and RST pins | VIN | -0.3 | 5.5 | V | 2.0 V ≤ VDD ≤ 3.6 V | 51 | |
| Input voltage on FT, FTf and RST pins | VIN | -0.3 | 5.2 | V | 1.65 V ≤ VDD ≤ 2.0 V | 51 | |
| Input voltage on BOOT0 pin | VIN | 0 | 5.5 | V | 51 | ||
| Power dissipation LQFP48 package | PD | 351 | mW | TA = 85 °C (range 6) | 51 | ||
| Power dissipation LQFP48 package | PD | 88 | mW | TA = 125 °C (range 3) | 51 | ||
| Temperature range | TA | -40 | 125 | °C | Temperature range 3 | 52 | |
| Junction temperature range | TJ | -40 | 130 | °C | Range 3, -40 °C ≤ TA ≤ 125 °C | 52 | |
| Power on/power down reset threshold, falling edge | VPOR/PDR | 1 | 1.5 | 1.65 | V | Falling edge | 52 |
| Power on/power down reset threshold, rising edge | VPOR/PDR | 1.3 | 1.5 | 1.65 | V | Rising edge | 52 |
| Brown-out reset threshold 0, falling edge | VBOR0 | 1.67 | 1.7 | 1.74 | V | Falling edge | 52 |
| Brown-out reset threshold 0, rising edge | VBOR0 | 1.69 | 1.76 | 1.8 | V | Rising edge | 52 |
| Programmable voltage detector threshold 0, falling edge | VPVD0 | 1.8 | 1.85 | 1.88 | V | Falling edge | 53 |
| Internal reference voltage | VREFINT out | 1.202 | 1.224 | 1.242 | V | -40 °C < TJ < +125 °C | 54 |
| Temperature coefficient of internal reference voltage | TCoeff | 25 | 100 | ppm/°C | -40 °C < TJ < +125 °C | 54 | |
| Voltage coefficient of internal reference voltage | VDDCoeff | 2000 | ppm/V | 3.0 V < VDDA < 3.6 V | 54 | ||
| 1/4 reference voltage | VREFINT_DIV1 | 24 | 25 | 26 | % | 54 | |
| Supply current in Stop mode | IDD (Stop) | 0.38 | 0.99 | µA | TA = -40 °C to 25 °C | 62 | |
| Supply current in Stop mode | IDD (Stop) | 7.55 | 19 | µA | TA = 125 °C | 62 | |
| Supply current in Standby mode, independent watchdog and LSI enabled | IDD (Standby) | 0.8 | 1.6 | µA | TA = -40 °C to 25 °C | 63 | |
| Supply current in Standby mode, independent watchdog and LSI off | IDD (Standby) | 1.55 | 5 | µA | TA = 125 °C | 63 | |
| Supply current in Run mode, code executed from Flash | IDD (Run from Flash) | 140 | 200 | µA | Range 3, VCORE=1.2 V, VOS[1:0]=11, 1 MHz | 56 | |
| Supply current in Run mode, code executed from Flash | IDD (Run from Flash) | 5 | 5.6 | mA | Range 1, VCORE=1.8 V, VOS[1:0]=01, 32 MHz | 56 | |
| Frequency of 16 MHz HSI16 oscillator | fHSI16 | 16 | MHz | VDD = 3.0 V | 71 | ||
| Accuracy of factory-calibrated HSI16 oscillator | ACCHSI16 | -5.45 | 3.25 | % | VDDA = 1.65 V to 3.6 V, TA = -40 to 125 °C | 71 | |
| HSE oscillator frequency | fOSC_IN | 1 | 25 | MHz | 69 | ||
| LSE oscillator frequency | fLSE | 32.768 | kHz | 70 | |||
| LSI frequency | fLSI | 26 | 38 | 56 | kHz | 72 | |
| LSI oscillator frequency drift | DLSI | -10 | 4 | % | 0 °C ≤ TA ≤ 85 °C | 72 | |
| Frequency error of MSI after factory calibration | ACCMSI | -0.5 | 0.5 | % | After factory calibration | 72 | |
| Weak pull-up equivalent resistor | RPU | 25 | 45 | 65 | kΩ | VIN = VSS | 79 |
| Weak pull-down equivalent resistor | RPD | 25 | 45 | 65 | kΩ | VIN = VDD | 79 |
| I/O pin capacitance | CIO | 5 | pF | 79 | |||
| Output low level voltage for an I/O pin, CMOS port | VOL | 0.4 | V | IIO = +8 mA, 2.7 V ≤ VDD ≤ 3.6 V | 81 | ||
| Output low level voltage for an I/O pin, TTL port | VOL | 0.4 | V | IIO = +8 mA, 2.7 V ≤ VDD ≤ 3.6 V | 81 | ||
| Output high level voltage for an I/O pin, TTL port | VOH | 2.4 | V | IIO = -6 mA, 2.7 V ≤ VDD ≤ 3.6 V | 81 | ||
| Output low level voltage for an I/O pin | VOL | 0.45 | V | IIO = +4 mA, 1.65 V ≤ VDD < 3.6 V | 81 | ||
| NRST input low level voltage | VIL(NRST) | 0.8 | V | 83 | |||
| NRST input high level voltage | VIH(NRST) | 1.4 | V | 83 | |||
| Weak pull-up equivalent resistor on NRST | RPU | 25 | 45 | 65 | kΩ | VIN = VSS | 83 |
| Analog supply voltage for ADC on, fast channel | VDDA | 1.65 | 3.6 | V | Fast channel | 84 | |
| Analog supply voltage for ADC on, standard channel | VDDA | 1.75 | 3.6 | V | Standard channel | 84 | |
| ADC clock frequency | fADC | 0.14 | 16 | MHz | Voltage scaling Range 1 | 84 | |
| ADC clock frequency | fADC | 0.14 | 8 | MHz | Voltage scaling Range 2 | 84 | |
| Programming time for word or half-page, programming | tprog | 3.28 | 3.94 | ms | 74 | ||
| Cycling (erase / write) program memory | NCYC | 10 | kcycles | TA = -40 °C to 105 °C | 75 |
CAD (KiCad official)
- Symbol:
STM32L041C6T7 - Footprint:
Package_QFP:LQFP-48_7x7mm_P0.5mm - 3D model: LQFP-48(7x7) (KiCad packages3D, STEP)
- 3D model files:
stm32l041c6t7-etched.step/stm32l041c6t7-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);stm32l041c6t7.step/stm32l041c6t7.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (123 pp, sha256
135a63989913af4f, retrieved 2026-11-06, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).