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π163M31
Public Made by Adomby adom
2Pai Semi Digital Isolators, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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Contents
README
markdownπ163M31
2Pai Semi · Digital Isolators · SOIC-16
π163M31 from 2Pai Semi, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD1 | power_in | Supply voltage for isolator side 1, specified for 3.0 V to 5.5 V operation with a 0.1 µF to 10 µF bypass capacitor to GND1. |
| 2 | VIA | input | Logic input A on side 1, which must reach at least 0.7×VDDx for a high level and stay at most 0.3×VDDx for a low level. |
| 3 | VIB | input | Logic input B on side 1, which must reach at least 0.7×VDDx for a high level and stay at most 0.3×VDDx for a low level. |
| 4 | VIC | input | Logic input C on side 1, which must reach at least 0.7×VDDx for a high level and stay at most 0.3×VDDx for a low level. |
| 5 | VOD | output | Logic output D on side 1, rated for ±6 mA (IOL 6 mA, IOH −6 mA) output current. |
| 6 | VOE | output | Logic output E on side 1, rated for ±6 mA (IOL 6 mA, IOH −6 mA) output current. |
| 7 | VOF | output | Logic output F on side 1, rated for ±6 mA (IOL 6 mA, IOH −6 mA) output current. |
| 8 | GND1 | power_in | Ground 1, the ground reference for isolator side 1. |
| 9 | GND2 | power_in | Ground 2, the ground reference for isolator side 2. |
| 10 | VIF | input | Logic input F on side 2, which must reach at least 0.7×VDDx for a high level and stay at most 0.3×VDDx for a low level. |
| 11 | VIE | input | Logic input E on side 2, which must reach at least 0.7×VDDx for a high level and stay at most 0.3×VDDx for a low level. |
| 12 | VID | input | Logic input D on side 2, which must reach at least 0.7×VDDx for a high level and stay at most 0.3×VDDx for a low level. |
| 13 | VOC | output | Logic output C on side 2, rated for ±6 mA (IOL 6 mA, IOH −6 mA) output current. |
| 14 | VOB | output | Logic output B on side 2, rated for ±6 mA (IOL 6 mA, IOH −6 mA) output current. |
| 15 | VOA | output | Logic output A on side 2, rated for ±6 mA (IOL 6 mA, IOH −6 mA) output current. |
| 16 | VDD2 | power_in | Supply voltage for isolator side 2, specified for 3.0 V to 5.5 V operation with a 0.1 µF to 10 µF bypass capacitor to GND2. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | 2Pai Semi |
| Package | SOIC-16 |
| Category | Interface ICs |
| Pins | 16 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage | VDDx | 3 | 5.5 | V | 4 | ||
| Maximum Data Rate | 0 | 10 | Mbps | 4 | |||
| Low Level Input Signal Voltage | VIL | 0 | V | 4 | |||
| Junction Temperature | TJ | -40 | 150 | °C | 4 | ||
| Ambient Operating Temperature | TA | -40 | 125 | °C | 4 | ||
| Supply Voltages (VDD1-GND1, VDD2-GND2) | -0.5 | 7 | V | 4 | |||
| Input Voltages (VIA, VIB) | -0.5 | V | 4 | ||||
| Output Voltages (VOA, VOB) | -0.5 | V | 4 | ||||
| Average Output Current per Pin, Side 1 | IO1 | -10 | 10 | mA | 4 | ||
| Average Output Current per Pin, Side 2 | IO2 | -10 | 10 | mA | 4 | ||
| Common-Mode Transients Immunity | -150 | 150 | kV/µs | 4 | |||
| Storage Temperature Range | TST | -65 | 150 | °C | 4 | ||
| Ambient Operating Temperature Range | TA | -40 | 125 | °C | 4 | ||
| Propagation Delay Time | tpHL, tpLH | 5.5 | 8 | 12.5 | ns | 50% input to 50% output, 50% @ 5VDC supply | 5 |
| Propagation Delay Time | tpHL, tpLH | 6.5 | 9 | 13.5 | ns | 50% input to 50% output, @ 3.3VDC supply | 5 |
| Pulse Width Distortion | PWD | 0 | 0.3 | 0.8 | ns | /tpHL - tpLH/, @ 5VDC supply | 5 |
| Channel to Channel Propagation Delay Skew | tCSK | 0 | 1 | ns | @ 5VDC supply | 5 | |
| Channel to Channel Propagation Delay Skew | tCSK | 0 | 0.8 | ns | @ 3.3VDC supply | 5 | |
| Low Level Output Voltage | VOL | 0 | 0.1 | V | 20 µA output current | 6 | |
| Low Level Output Voltage | VOL | 0.1 | 0.2 | V | 2 mA output current | 6 | |
| Input Current per Signal Channel | IIN | -10 | 0.5 | 10 | µA | 0 V ≤ Signal voltage ≤ VDDX1 | 6 |
| VDDx1 Undervoltage Rising Threshold | VDDxUV+ | 2.45 | 2.65 | 2.9 | V | 6 | |
| VDDx1 Undervoltage Falling Threshold | VDDxUV− | 2.3 | 2.5 | 2.75 | V | 6 | |
| Quiescent Supply Current | IDD1 (Q) | 1258 | 1572 | 2044 | µA | @5VDC Supply; 0V Input signal | 7 |
| Quiescent Supply Current | IDD1 (Q) | 1308 | 1635 | 2126 | µA | @5VDC Supply; 5V Input signal | 7 |
| Quiescent Supply Current | IDD1 (Q) | 1243 | 1554 | 2020 | µA | @3.3VDC Supply; 0V Input signal | 7 |
| Quiescent Supply Current | IDD1 (Q) | 1224 | 1530 | 1989 | µA | @3.3VDC Supply; 3.3V Input signal | 7 |
| Total Supply Current vs. Data Throughput, 150 Kbps | IDD1 | 1.62 | 2.43 | mA | @5VDC Supply; 150 Kbps; CL = 0 pF | 7 | |
| Total Supply Current vs. Data Throughput, 1 Mbps | IDD1 | 1.74 | 2.61 | mA | @5VDC Supply; 1 Mbps; CL = 0 pF | 7 | |
| Total Supply Current vs. Data Throughput, 10 Mbps | IDD1 | 2.91 | 4.37 | mA | @5VDC Supply; 10 Mbps; CL = 0 pF | 7 | |
| Total Supply Current vs. Data Throughput, 150 Kbps | IDD1 | 1.56 | 2.34 | mA | @3.3VDC Supply; 150 Kbps; CL = 0 pF | 7 | |
| Total Supply Current vs. Data Throughput, 1 Mbps | IDD1 | 1.62 | 2.43 | mA | @3.3VDC Supply; 1 Mbps; CL = 0 pF | 7 | |
| Total Supply Current vs. Data Throughput, 10 Mbps | IDD1 | 2.31 | 3.47 | mA | @3.3VDC Supply; 10 Mbps; CL = 0 pF | 7 | |
| Junction-to-Ambient Thermal Resistance (SOIC, M3x) | θJA | 76 | °C/W | Thermocouple located at center of package underside | 8 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| housing | pC | In accordance with DIN V VDE V 0884-10, eachπ160M3x/π161M3x/π162M3x /π163M3x is proof tested by applying an insulation test voltage ≥ 1326 V peak for 1 sec (partial discharge detection limit = 5 pC); | 8 |
CAD (KiCad official)
- Symbol:
π163M31 - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SOIC-16 (KiCad packages3D, STEP)
- 3D model files:
163m31-etched.step/163m31-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);163m31.step/163m31.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: 2Pai Semi datasheet (16 pp, sha256
c74ed3c68bf24fd9, retrieved 2026-10-21, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).